Datasheet

DS90CP22
www.ti.com SNLS053E –MARCH 2000–REVISED APRIL 2013
Electrical Characteristics
(1)
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
CMOS/TTL DC SPECIFICATIONS (EN0,EN1,SEL0,SEL1)
V
IH
High Level Input Voltage 2.0 V
CC
V
V
IL
Low Level Input Voltage GND 0.8 V
I
IH
High Level Input Current V
IN
= 3.6V or 2.0V; V
CC
= 3.6V +7 +20 μA
I
IL
Low Level Input Current V
IN
= 0V or 0.8V; V
CC
= 3.6V ±1 ±10 μA
V
CL
Input Clamp Voltage I
CL
= −18 mA −0.8 −1.5 V
LVDS OUTPUT DC SPECIFICATIONS (OUT0,OUT1)
V
OD
Differential Output Voltage R
L
= 75Ω 270 365 475 mV
R
L
= 75Ω, V
CC
= 3.3V, T
A
= 25°C 285 365 440 mV
ΔV
OD
Change in V
OD
between Complimentary Output States 35 mV
V
OS
Offset Voltage
(2)
1.0 1.2 1.45 V
ΔV
OS
Change in V
OS
between Complimentary Output States 35 mV
I
OZ
Output TRI-STATE Current TRI-STATE Output, ±1 ±10 μA
V
OUT
= V
CC
or GND
I
OFF
Power-Off Leakage Current V
CC
= 0V; V
OUT
= 3.6V or GND ±1 ±10 μA
I
OS
Output Short Circuit Current V
OUT+
OR V
OUT−
= 0V −15 −25 mA
I
OSB
Both Outputs Short Circuit Current V
OUT+
AND V
OUT−
= 0V −30 −50 mA
LVDS RECEIVER DC SPECIFICATIONS (IN0,IN1)
V
TH
Differential Input High Threshold V
CM
= +0.05V or +1.2V or +3.25V, 0 +100 mV
V
TL
Differential Input Low Threshold Vcc = 3.3V −100 0 mV
V
CMR
Common Mode Voltage Range V
ID
= 100mV, Vcc = 3.3V 0.05 3.25 V
I
IN
V
IN
= +3.0V, V
CC
= 3.6V or 0V ±1 ±10 μA
Input Current
V
IN
= 0V, V
CC
= 3.6V or 0V ±1 ±10 μA
SUPPLY CURRENT
I
CCD
Total Supply Current R
L
= 75Ω, C
L
= 5 pF, EN0 = EN1 = High 98 125 mA
I
CCZ
TRI-STATE Supply Current EN0 = EN1 = Low 43 55 mA
(1) All typical are given for V
CC
= +3.3V and T
A
= +25°C, unless otherwise stated.
(2) V
OS
is defined and measured on the ATE as (V
OH
+ V
OL
) / 2.
AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
(1)
Symbol Parameter Conditions Min Typ Max Units
T
SET
Input to SEL Setup Time
(2)
, (Figure 3 and Figure 4) 0.7 0.5 ns
T
HOLD
Input to SEL Setup Time
(2)
, (Figure 3 and Figure 4) 1.0 0.5 ns
T
SWITCH
SEL to Switched Output, (Figure 3 and Figure 4) 0.9 1.2 1.7 ns
T
PHZ
Disable Time (Active to TRI-STATE) High to Z, Figure 5 2.1 4.0 ns
T
PLZ
Disable Time (Active to TRI-STATE) Low to Z, Figure 5 3.0 4.5 ns
T
PZH
Enable Time (TRI-STATE to Active) Z to High, Figure 5 25.5 55.0 ns
T
PZL
Enable Time (TRI-STATE to Active) Z to Low, Figure 5 25.5 55.0 ns
T
LHT
Output Low-to-High Transition Time, 20% to 80%, Figure 7 290 400 580 ps
T
HLT
Output High-to-Low Transition Time, 80% to 20%, Figure 7 290 400 580 ps
(1) The parameters are specified by design. The limits are based on statistical analysis of the device performance over PVT (process,
voltage and temperature) range.
(2) T
SET
and T
HOLD
time specify that data must be in a stable state before and after the SEL transition.
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