Datasheet

DS90C402
www.ti.com SNLS001C –JUNE 1998–REVISED APRIL 2013
Switching Characteristics
V
CC
= +5.0V ± 10%, T
A
= −40°C to +85°C
(1)(2)(3)(4)(5)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low C
L
= 5 pF, 1.0 3.40 6.0 ns
V
ID
= 200 mV
t
PLHD
Differential Propagation Delay Low to High 1.0 3.48 6.0 ns
(Figure 1 and Figure 2)
t
SKD
Differential Skew |t
PHLD
− t
PLHD
| 0 0.08 1.2 ns
t
SK1
Channel-to-Channel Skew
(3)
0 0.6 1.5 ns
t
SK2
Chip to Chip Skew
(4)
5.0 ns
t
TLH
Rise Time 0.5 2.5 ns
t
THL
Fall Time 0.5 2.5 ns
(1) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(2) Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, t
r
and t
f
(0%–100%) ≤ 1 ns for R
IN
.
(3) Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same
chip with an event on the inputs.
(4) Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
(5) C
L
includes probe and jig capacitance.
Parameter Measurement Information
Figure 1. Receiver Propagation Delay and Transition Time Test Circuit
Figure 2. Receiver Propagation Delay and Transition Time Waveforms
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