Datasheet
DS90C402
www.ti.com
SNLS001C –JUNE 1998–REVISED APRIL 2013
DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
Check for Samples: DS90C402
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FEATURES
DESCRIPTION
The DS90C402 is a dual receiver device optimized
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• Ultra Low Power Dissipation
for high data rate and low power applications. This
• Operates above 155.5 Mbps
device along with the DS90C401 provides a pair chip
• Standard TIA/EIA-644
solution for a dual high speed point-to-point interface.
The device is in a PCB space saving 8 lead small
• 8 Lead SOIC Package saves PCB space
outline package. The receiver offers ±100 mV
• V
CM
±1V center around 1.2V
threshold sensitivity, in addition to common-mode
• ±100 mV Receiver Sensitivity
noise protection.
Connection Diagram
See Package Number D (SOIC)
Functional Diagram
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.