Datasheet

NRND
DS90C401
www.ti.com SNLS002C –JUNE 1998–REVISED APRIL 2013
Switching Characteristics
V
CC
= +5.0V ±10%, T
A
= −40°C to +85°C
(1)(2)(3)(4)(5)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low R
L
= 100Ω, C
L
= 5 pF 0.5 2.0 3.5 ns
(Figure 2 and Figure 3)
t
PLHD
Differential Propagation Delay Low to High 0.5 2.1 3.5 ns
t
SKD
Differential Skew |t
PHLD
– t
PLHD
| 0 80 900 ps
t
SK1
Channel-to-Channel Skew
(2)
0 0.3 1.0 ns
t
SK2
Chip to Chip Skew
(3)
3.0 ns
t
TLH
Rise Time 0.35 2.0 ns
t
THL
Fall Time 0.35 2.0 ns
(1) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(2) Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the
same chip with an event on the inputs.
(3) Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
(4) Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50Ω, t
r
≤ 6 ns, and t
f
≤ 6 ns.
(5) C
L
includes probe and jig capacitance.
Parameter Measurement Information
Figure 1. Driver V
OD
and V
OS
Test Circuit
Figure 2. Driver Propagation Delay and Transition Time Test Circuit
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