Datasheet

DS90C387, DS90CF388
www.ti.com SNLS012H –MAY 2000–REVISED APRIL 2013
Chipset RSKM Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
(1) (2)
. See Applications Information
for more details on this parameter and how to apply it.
Symbol Parameter Min Typ Max Unit
RSKMD Receiver Skew Margin with Deskew in DC Balance, f = 40 to 80 MHz 0.25TBIT ps
(Figure 13)
(4)
RDR Receiver Deskew Range f = 80 MHz ± 1 TBIT
RDSS Receiver Deskew Step Size f = 80 MHz 0.3 TBIT ns
(4) Receiver Skew Margin with Deskew (RSKMD) is defined as the valid data sampling region at the receiver inputs. The DESKEW function
will constrain the receiver’s sampling strobes to the middle half of the LVDS bit and removes (adjusts for) fixed interconnect skew. This
margin (RSKMD) allows for inter-symbol interference (dependent on type/length of cable), Transmitter Pulse Position (TPPOS) variance,
and LVDS clock jitter (TJCC).RSKMD ≥ ISI + TPPOS(variance) + source clock jitter (cycle to cycle). See Applications Information for
more details.
AC Timing Diagrams
A. The worst case test pattern produces a maximum toggling of digital circuits, LVDS I/O and CMOS/TTL I/O.
B. Figure 1 and Figure 2 show a falling edge data strobe (TxCLK IN/RxCLK OUT).
Figure 1. “Worst Case” Test Pattern
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