Datasheet

Electrical Characteristics (Continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Units
TRANSMITTER SUPPLY CURRENT
(Figures 1, 3 ) ,T
A
=
−40˚C to +85˚C
f = 65 MHz 42 55 mA
ICCTG Transmitter Supply Current R
L
= 100Ω,
C
L
= 5 pF,
f = 32.5 MHz 23 35 mA
16 Grayscale 16 Grayscale Pattern f = 37.5 MHz 28 40 mA
(Figures 2, 3 ) ,T
A
=
−40˚C to +85˚C
f = 65 MHz 31 45 mA
ICCTZ Transmitter Supply Current Power Down = Low
10 55 µA
Power Down Driver Outputs in TRI-STATE
®
under
Power Down Mode
RECEIVER SUPPLY CURRENT
ICCRW Receiver Supply Current C
L
= 8 pF, f = 32.5 MHz 49 65 mA
Worst Case Worst Case Pattern f = 37.5 MHz 53 70 mA
(Figures 1, 4 ) ,T
A
=
−40˚C to +85˚C
f = 65 MHz 78 105 mA
ICCRG Receiver Supply Current, C
L
= 8 pF, f = 32.5 MHz 28 45 mA
16 Grayscale 16 Grayscale Pattern f = 37.5 MHz 30 47 mA
(Figures 2, 4 ) ,T
A
=
−40˚C to +85˚C
f = 65 MHz 43 60 mA
ICCRZ Receiver Supply Current Power Down = Low
10 55 µA
Power Down Receiver Outputs Stay Low during
Power Down Mode
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
Note 2: Typical values are given for V
CC
= 3.3V and T
A
= +25C.
Note 3: Current into device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground unless otherwise
specified (except V
OD
and ∆V
OD
).
Note 4: V
OS
previously referred as V
CM
.
Transmitter Switching Characteristics
Over recommended operating supply and −40˚C to +85˚C ranges unless otherwise specified
Symbol Parameter Min Typ Max Units
LLHT LVDS Low-to-High Transition Time
(Figure 3 ) 0.75 1.5 ns
LHLT LVDS High-to-Low Transition Time
(Figure 3 ) 0.75 1.5 ns
TCIT TxCLK IN Transition Time
(Figure 5 ) 5ns
TCCS TxOUT Channel-to-Channel Skew
(Figure 6 ) 250 ps
TPPos0 Transmitter Output Pulse Position for Bit 0
(Figure 17 ) f = 65 MHz −0.4 0 0.3 ns
TPPos1 Transmitter Output Pulse Position for Bit 1 1.8 2.2 2.5 ns
TPPos2 Transmitter Output Pulse Position for Bit 2 4.0 4.4 4.7 ns
TPPos3 Transmitter Output Pulse Position for Bit 3 6.2 6.6 6.9 ns
TPPos4 Transmitter Output Pulse Position for Bit 4 8.4 8.8 9.1 ns
TPPos5 Transmitter Output Pulse Position for Bit 5 10.6 11 11.3 ns
TPPos6 Transmitter Output Pulse Position for Bit 6 12.8 13.2 13.5 ns
TCIP TxCLK IN Period
(Figure 7) 15 T 50 ns
TCIH TxCLK IN High Time
(Figure 7) 0.35T 0.5T 0.65T ns
TCIL TxCLK IN Low Time
(Figure 7) 0.35T 0.5T 0.65T ns
TSTC TxIN Setup to TxCLK IN
(Figure 7 ) f = 65 MHz 2.5 ns
THTC TxIN Hold to TxCLK IN
(Figure 7 ) 0ns
TCCD TxCLK IN to TxCLK OUT Delay 25˚C, V
CC
= 3.3V (Figure 9 ) 3.0 3.7 5.5 ns
DS90C383/DS90CF384
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