Datasheet

Ideal Sampling Position
t
BIT
(1UI)
Sampling
Window
Ideal Data Bit
End
Ideal Data Bit
Beginning
RxIN_TOL -L
2
t
BIT
( )
RxIN_TOL -R
Data Valid
Before RCLK
Data Valid
After RCLK
ROUT [7:0]
Data Valid
Before RCLK
Data Valid
After RCLK
ROUT [15:8], LOCK
Data Valid
Before RCLK
Data Valid
After RCLK
V
DD
/2
ROUT [23:16]
RCLK
t
LOW
t
HIGH
t
ROS
t
ROH
t
ROS
t
ROH
(group 1) (group 1)
(group 2) (group 2)
1/2 UI 1/2 UI
t
ROS
t
ROH
(group 3) (group 3)
1/2 UI 1/2 UI
V
DD
/2
V
DD
/2V
DD
/2
V
DD
/2V
DD
/2
V
DD
/2V
DD
/2
DS90C124, DS90C241
SNLS209L –NOVEMBER 2005–REVISED APRIL 2013 www.ti.com
Figure 15. Deserializer Setup and Hold Times
RxIN_TOL_L is the ideal noise margin on the left of the figure, with respect to ideal.
RxIN_TOL_R is the ideal noise margin on the right of the figure, with respect to ideal.
Figure 16. Receiver Input Tolerance (RxIN_TOL) and Sampling Window
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