Datasheet

DS90C124, DS90C241
www.ti.com SNLS209L –NOVEMBER 2005–REVISED APRIL 2013
Pin # Pin Name I/O Description
2 RESRVD LVCMOS_I Reserved. This pin MUST be tied LOW.
LVDS SERIAL INTERFACE PINS
41 RIN+ LVDS_I Receiver LVDS True (+) Input
This input is intended to be terminated with a 100Ω load to the R
IN+
pin. The interconnect should
be AC Coupled to this pin with a 100 nF capacitor.
42 RIN− LVDS_I Receiver LVDS Inverted (−) Input
This input is intended to be terminated with a 100Ω load to the R
IN-
pin. The interconnect should
be AC Coupled to this pin with a 100 nF capacitor.
POWER / GROUND PINS
39 VDDIR VDD Analog LVDS Voltage supply, Power
40 VSSIR GND Analog LVDS Ground
47 VDDPR0 VDD Analog Voltage supply, PLL Power
46 VSSPR0 GND Analog Ground, PLL Ground
45 VDDPR1 VDD Analog Voltage supply, PLL VCO Power
44 VSSPR1 GND Analog Ground, PLL VCO Ground
37 VDDR1 VDD Digital Voltage supply, Logic Power
38 VSSR1 GND Digital Ground, Logic Ground
36 VDDR0 VDD Digital Voltage supply, Logic Power
35 VSSR0 GND Digital Ground, Logic Ground
30 VDDOR1 VDD Digital Voltage supply, LVCMOS Output Power
29 VSSOR1 GND Digital Ground, LVCMOS Output Ground
20 VDDOR2 VDD Digital Voltage supply, LVCMOS Output Power
19 VSSOR2 GND Digital Ground, LVCMOS Output Ground
7 VDDOR3 VDD Digital Voltage supply, LVCMOS Output Power
8 VSSOR3 GND Digital Ground, LVCMOS Output Ground
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