Datasheet

DS90C032B
SNLS052C –MARCH 1999–REVISED APRIL 2013 www.ti.com
Switching Characteristics
V
CC
= +5.0V ± 10%, T
A
= −40°C to +85°C
(1)(2)(3)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low 1.0 3.40 6.0 ns
t
PLHD
Differential Propagation Delay Low to High 1.0 3.48 6.0 ns
t
SKD
Differential Skew |t
PHLD
− t
PLHD
| 0 0.08 1.2 ns
C
L
= 5 pF, V
ID
= 200 mV,
t
SK1
Channel-to-Channel Skew
(4)
0 0.6 1.5 ns
See Figure 2 and Figure 3
t
SK2
Chip to Chip Skew
(5)
5.0 ns
t
TLH
Rise Time 0.5 2.5 ns
t
THL
Fall Time 0.5 2.5 ns
t
PHZ
Disable Time High to Z 10 20 ns
t
PLZ
Disable Time Low to Z 10 20 ns
R
L
= 2 kΩ, C
L
= 10 pF,
See Figure 4 and Figure 5
t
PZH
Enable Time Z to High 4 15 ns
t
PZL
Enable Time Z to Low 4 15 ns
(1) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(2) Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50Ω, t
r
and t
f
(0%–100%) ≤ 1 ns for R
IN
and t
r
and t
f
≤ 6 ns
for EN or EN*.
(3) C
L
includes probe and jig capacitance.
(4) Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same
chip with an event on the inputs.
(5) Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
Parameter Measurement Information
Figure 2. Receiver Propagation Delay and Transition Time Test Circuit
Figure 3. Receiver Propagation Delay and Transition Time Waveforms
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