Datasheet
DS90C031B
SNLS051B –MARCH 1999–REVISED MARCH 2013
www.ti.com
Switching Characteristics
V
CC
= +5.0V, T
A
= +25°C
(1) (2) (3)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low R
L
= 100Ω, C
L
= 5 pF 1.0 2.0 3.0 ns
(Figure 3 and Figure 4)
t
PLHD
Differential Propagation Delay Low to High 1.0 2.1 3.0 ns
t
SKD
Differential Skew |t
PHLD
– t
PLHD
| 0 80 400 ps
t
SK1
Channel-to-Channel Skew
(4)
0 300 600 ps
t
TLH
Rise Time 0.35 1.5 ns
t
THL
Fall Time 0.35 1.5 ns
t
PHZ
Disable Time High to Z R
L
= 100Ω, C
L
= 5 pF 2.5 10 ns
(Figure 5 and Figure 6)
t
PLZ
Disable Time Low to Z 2.5 10 ns
t
PZH
Enable Time Z to High 2.5 10 ns
t
PZL
Enable Time Z to Low 2.5 10 ns
(1) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(2) Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50Ω, t
r
≤ 6 ns, and t
f
≤ 6 ns.
(3) C
L
includes probe and jig capacitance.
(4) Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the
same chip with an event on the inputs.
Switching Characteristics
V
CC
= +5.0V ± 10%, T
A
= −40°C to +85°C
(1) (2) (3)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low R
L
= 100Ω, C
L
= 5 pF 0.5 2.0 3.5 ns
(Figure 3 and Figure 4)
t
PLHD
Differential Propagation Delay Low to High 0.5 2.1 3.5 ns
t
SKD
Differential Skew |t
PHLD
– t
PLHD
| 0 80 900 ps
t
SK1
Channel-to-Channel Skew
(4)
0 0.3 1.0 ns
t
SK2
Chip to Chip Skew
(5)
3.0 ns
t
TLH
Rise Time 0.35 2.0 ns
t
THL
Fall Time 0.35 2.0 ns
t
PHZ
Disable Time High to Z R
L
= 100Ω, C
L
= 5 pF 2.5 15 ns
(Figure 5 and Figure 6)
t
PLZ
Disable Time Low to Z 2.5 15 ns
t
PZH
Enable Time Z to High 2.5 15 ns
t
PZL
Enable Time Z to Low 2.5 15 ns
(1) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(2) Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50Ω, t
r
≤ 6 ns, and t
f
≤ 6 ns.
(3) C
L
includes probe and jig capacitance.
(4) Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the
same chip with an event on the inputs.
(5) Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
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