Datasheet

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DS89C386

www.ti.com

SNLS100C –MAY 1995–REVISED APRIL 2013

DS89C386 Twelve Channel CMOS Differential Line Receiver

Check for Samples: DS89C386

FEATURES

DESCRIPTION

The DS89C386 is a high speed twelve channel

• Low Power Design—240 mW Typical

CMOS differential receiver that meets the

• Meets TIA/EIA-422-B (RS-422)

requirements of TIA/EIA-422-B. The DS89C386

• Receiver OPEN Input Failsafe Feature

features low power dissipation of 240 mW typical.

• Ensured AC Parameters:

Each TRI-STATE enable, EN, allows the receiver

– Maximum Receiver Skew −4 ns

output to be active or in a Hi-impedance off state.

Each enable is common to only two receivers for

– Maximum Transition Time −9 ns

flexibility and multiplexing of receiver outputs.

• High Output Drive Capability: ±6 mA

The receiver output (RO) is ensured to be High when

• Available in SSOP Packaging:

the inputs are left open and unterminated. The

– Requires 30% less PCB Space than 3

receiver can detect signals as low and including ±200

DS34C86TMs

mV over the common mode range of ±7V. The

receiver outputs (RO) are compatible with both TTL

and CMOS levels.

Connection Diagrams

1/6 of package

Figure 2. Function Diagram

Truth Table

(1)

Enable Inputs Output

EN RI–RI* RO

L X Z

H ≥200 mV or OPEN

(1)

H ≤ −200 mV L

H +200 mV > and > −200 mV X

Figure 1. 48-Pin SSOP

See Package Number DL0048A (1) Not terminated.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (13 pages)

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DS89C386 www.ti.com SNLS100C – MAY 1995 – REVISED APRIL 2013 DS89C386 Twelve Channel CMOS Differential Line Receiver Check for Samples: DS89C386 FEATURES DESCRIPTION • • • • The DS89C386 is a high speed twelve channel CMOS differential receiver that meets the requirements of TIA/EIA-422-B. The DS89C386 features low power dissipation of 240 mW typical.
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DS89C386 SNLS100C – MAY 1995 – REVISED APRIL 2013 www.ti.com Absolute Maximum Ratings (1) (2) (3) −0.5 to 7V Supply Voltage (VCC) Input Common Mode Range (VCM) ±14V Differential Input Voltage (VDIFF) ±14V Enable Input Voltage (VIN) 7V Storage Temperature Range (TSTG) −65°C to +150°C Lead Temperature (Soldering 4 sec) 260°C Maximum Power Dissipation at 25°C (4) SSOP Package 1359 mW Current Per Output ±25 mA This device does not meet 2000V ESD rating.
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DS89C386 www.ti.com SNLS100C – MAY 1995 – REVISED APRIL 2013 AC Electrical Characteristics (1) VCC = 5V ±10% (Figure 3, Figure 4, and Figure 5) Parameter Test Conditions tPLH, Propagation Delay CL = 50 pF tPHL Input to Output VDIFF = 2.5V Min Typ Max Units 10 19 30 ns 0 2 4 ns 4 9 ns 13 18 ns 13 21 ns VCM = 0V tSK Skew CL = 50 pF VDIFF = 2.5V VCM = 0V tRISE, Output Rise and CL = 50 pF tFALL Fall Times VDIFF = 2.
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DS89C386 SNLS100C – MAY 1995 – REVISED APRIL 2013 www.ti.com Parameter Measurement Information Figure 3. Propagation Delays CL Includes load and test jig capacitance. S1 = VCC for tPZL, and tPLZ measurements. S1 = GND for tPZH, and tPHZ measurements. S1 = Open for tPLH, tPHL, and tSK. Figure 4. Test Circuit for Switching Characteristics Figure 5. TRI-STATE Output Enable and Disable Waveforms APPLICATION INFORMATION * RT is optional although highly recommended to reduce reflections. Figure 6.
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DS89C386 www.ti.com SNLS100C – MAY 1995 – REVISED APRIL 2013 SKEW Skew may be thought of in a lot of different ways, the next few paragraphs should clarify what is represented by tSK in this datasheet and how it is determined. Skew, as used in this databook, is the absolute value of a mathematical difference between two propagation delays. This is commonly accepted throughout the semiconductor industry.
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DS89C386 SNLS100C – MAY 1995 – REVISED APRIL 2013 www.ti.com In Figure 10, VX, where X is a number, is the waveform voltage level at which the propagation delay measurement either starts or stops. Furthermore, V1 and V2 are normally identical. The same is true for V3 and V4. However, as mentioned before, these levels are not standardized and may vary, even with similar devices from other companies. Also note, VREF in Figure 3 should equal V1 and V2 in Figure 10.
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DS89C386 www.ti.com SNLS100C – MAY 1995 – REVISED APRIL 2013 For the DS89C386, the maximum channel to channel skew is 20 ns (tp max—tp min) where tp is the low to high or high to low propagation delay. The minimum channel to channel skew is 0 ns since it is possible for all 12 receivers to have identical propagation delays. Note, this is best and worst case calculations used whenever tSK (channel) is not independently characterized and specified in the datasheet.
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DS89C386 SNLS100C – MAY 1995 – REVISED APRIL 2013 www.ti.com Figure 15. Receiver Output Equivalent Circuit Figure 16. Receiver Enable Equivalent Circuit Table 2. Pin Descriptions Pin No.
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DS89C386 www.ti.com SNLS100C – MAY 1995 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision B (April 2013) to Revision C • Page Changed layout of National Data Sheet to TI format ............................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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