Datasheet

DS80PCI800
www.ti.com SNLS334E –APRIL 2011–REVISED MARCH 2012
Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Units
Power
PD Power Dissipation VDD = 2.5 V supply, 500 700 mW
EQ Enabled,
VOD = 1.0 Vp-p,
RXDET = 1, PRSNT = 0
VIN = 3.3 V supply, 660 900 mW
EQ Enabled,
VOD = 1.0 Vp-p,
RXDET = 1, PRSNT = 0
LVCMOS / LVTTL DC Specifications
V
ih
High Level Input 2.0 3.6 V
Voltage
V
il
Low Level Input 0 0.8 V
Voltage
V
oh
High Level Output I
oh
= −4mA 2.0 V
Voltage
(ALL_DONE pin)
V
ol
Low Level Output I
ol
= 4mA 0.4 V
Voltage
(ALL_DONE pin)
I
ih
Input High Current VIN = 3.6 V, -15 +15 uA
(PRSNT pin) LVCMOS = 3.6 V
Input High Current +20 +150 uA
with internal resistors
(4–level input pin)
I
il
Input Low Current VIN = 3.6 V, -15 +15 uA
(PRSNT pin) LVCMOS = 0 V
Input Low Current -160 -40 uA
with internal resistors
(4–level input pin)
CML Receiver Inputs (IN_n+, IN_n-)
RL
rx-diff
RX Differential return 0.05 - 1.25 GHz -16 dB
loss
1.25 - 2.5 GHz -16 dB
2.5 - 4.0 GHz -14 dB
RLrx-cm RX Common mode 0.05 - 2.5 GHz -12 dB
return loss
2.5 - 4.0 GHz -8 dB
Zrx-dc RX DC common mode Tested at VDD = 2.5 V 40 50 60 Ω
impedance
Zrx-diff-dc RX DC differntial mode Tested at VDD = 2.5 V 80 100 120 Ω
impedance
Vrx-diff-dc Differential RX peak to Tested at pins 0.6 1.0 1.2 V
peak voltage (VID)
Zrx-high-imp-dc- DC Input common VID = 0 to 200mV, 50 KΩ
pos mode impedance for ENSMB = 0, RXDET = 0,
V>0 VDD = 2.5 V
Vrx-signal-det- Signal detect assert SD_TH = float, 180 mVp-p
diff-pp level for active data 0101 pattern at 8 Gbps
signal
Vrx-idle-det-diff- Signal detect de-assert SD_TH = float, 110 mVp-p
pp level for electrical idle 0101 pattern at 8 Gbps
High Speed Outputs
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