Datasheet

DS80PCI800
SNLS334E –APRIL 2011–REVISED MARCH 2012 www.ti.com
Table 9. SMBUS Slave Mode Register Map (continued)
Address Register Name Bit (s) Field Type Default Description
0x2D CH4 - CHA0 7 Short Circuit R/W 0xAD 1: Enable the short circuit protection
VOD Protection 0: Disable the short circuit protection
6 RATE_SEL 1: Gen 1/2,
0: Gen 3
Note: override the RATE pin.
5:3 Reserved Set bits to default value - 101.
2:0 VOD Control OA0 VOD Control
000: 0.7 V
001: 0.8 V
010: 0.9 V
011: 1.0 V
100: 1.1 V
101: 1.2 V (default)
110: 1.3 V
111: 1.4 V
0x2E CH4 - CHA0 7 RXDET STATUS R 0x02 Observation bit for RXDET CH4 - CHA0.
DEM 1: RX = detected
0: RX = not detected
6:5 RATE_DET R Observation bit for RATE_DET CH4 - CHA0.
STATUS 00: GEN1 (2.5G)
01: GEN2 (5G)
11: GEN3 (8G)
4:3 Reserved R/W Set bits to 0.
2:0 DEM Control R/W OA0 DEM Control
000: 0 dB
001: –1.5 dB
010: –3.5 dB (default)
011: –5 dB
100: –6 dB
101: –8 dB
110: –9 dB
111: –12 dB
0x2F CH4 - CHA0 7:4 Reserved R/W 0x00 Set bits to 0.
IDLE Threshold
3:2 IDLE thd De-assert threshold
00 = 110 mVp-p (default)
01 = 100 mVp-p
10 = 150 mVp-p
11 = 130 mVp-p
Note: override the SD_TH pin.
1:0 IDLE tha Assert threshold
00 = 180 mVp-p (default)
01 = 160 mVp-p
10 = 210 mVp-p
11 = 190 mVp-p
Note: override the SD_TH pin.
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