Datasheet
DS80PCI800
www.ti.com
SNLS334E –APRIL 2011–REVISED MARCH 2012
1. The Host drives a START condition, the 7-bit SMBus address, and a “0” indicating a WRITE.
2. The Device (Slave) drives the ACK bit (“0”).
3. The Host drives the 8-bit Register Address.
4. The Device drives an ACK bit (“0”).
5. The Host drives a START condition.
6. The Host drives the 7-bit SMBus Address, and a “1” indicating a READ.
7. The Device drives an ACK bit “0”.
8. The Device drives the 8-bit data value (register contents).
9. The Host drives a NACK bit “1”indicating end of the READ transfer.
10. The Host drives a STOP condition.
The READ transaction is completed, the bus goes IDLE and communication with other SMBus devices may now
occur.
Please see SMBus Register Map Table for more information.
Table 9. SMBUS Slave Mode Register Map
Address Register Name Bit (s) Field Type Default Description
0x00 Observation, 7 Reserved R/W 0x00 Set bit to 0.
Reset
6:3 Address Bit R Observation of AD[3:0] bit
AD[3:0] [6]: AD3
[5]: AD2
[4]: AD1
[3]: AD0
2 EEPROM Read R 1: Device completed the read from external
Done EEPROM.
1 Block Reset R/W 1: Block bit 0 from resettting the registers; self
clearing.
0 Reset R/W SMBus Reset
1: Reset registers to default value; self clearing.
0x01 PWDN Channels 7:0 PWDN CHx R/W 0x00 Power Down per Channel
[7]: CH7 – CHA_3
[6]: CH6 – CHA_2
[5]: CH5 – CHA_1
[4]: CH4 – CHA_0
[3]: CH3 – CHB_3
[2]: CH2 – CHB_2
[1]: CH1 – CHB_1
[0]: CH0 – CHB_0
00'h = all channels enabled
FF'h = all channels disabled
Note: override PRSNT pin.
0x02 Override 7:1 Reserved R/W 0x00 Set bits to 0.
PRSNT Control
0 Override PRSNT 1: Block PRSNT pin control
0: Allow PRSNT pin control
0x05 Slave Mode CRC Bits 7:0 CRC bits R/W 0x00 CRC bits [7:0]
0x06 Slave CRC Control 7:5 Reserved R/W 0x10 Set bits to 0.
4 Reserved Set bit to 1.
3 Slave CRC 1: Disables the slave CRC mode
0: Enables the slave CRC mode
Note: In order to change VOD, DEM and EQ of the
channels in slave mode, set bit to 1 to disable the
CRC.
2:0 Reserved Set bits to 0.
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