Datasheet

OB_0+
OB_0-
OB_1+
VOD1
VOD0
SD_TH
1
2
3
4
26 25
TOP VIEW
DAP = GND
OB_1-
OB_2+
OB_2-
5
6
7
24 21 20 23
IA_3-
8
IA_0+
IA_0-
VDD
IA_1+
9
10
11
12
IA_1-
EQA0
IA_2+
IA_2-
13
18
14
15
IA_3+
16
17
OA_1+
OA_1-
EQA1
OA_2+
36
34
35
OA_2-
OA_3+
OA_3-
33
31
32
TXIDLEA
TXIDLEB
IB_3+
IB_3-
VDD
41
40
39
RATE
OA_0+
OA_0-
37
38
IB_0+
IB_0-
IB_1+
IB_1-
IB_2-
IB_2+
44
42
43
VDD
DEMA1/SCL
50 48
47
49
DEMA0/SDA
ENSMB
46
51
OB_3+
OB_3-
SMBUS AND CONTROL
DEMB1/AD0
DEMB0/AD1
30
29
28
NC
52
EQB1/AD2 EQB0/AD3
19 22
PWDN
27
45
53 54
VDD
VDD
Ix_n+
Ix_n-
EQ
RATE
DET
LIMITER
IDLE
DET
OUTBUF
SMBus
VOD/DE-EMPHASIS CONTROL
VDD
SMBus
TX Idle Enable
SMBus
DEMA/B
EQA/B
Ox_n+
Ox_n-
TXIDLEx
DS64BR401
www.ti.com SNLS304G –JUNE 2009–REVISED APRIL 2013
BLOCK DIAGRAM - DETAIL VIEW OF THE EACH CHANNEL (1 OF 8)
PIN DIAGRAM
Figure 1. DS64BR401 Pin Diagram 54L WQFN
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Product Folder Links: DS64BR401