Datasheet

DS50PCI401
SNLS292J –JUNE 2009–REVISED APRIL 2013 www.ti.com
pin 46 – CH4 with CH6,
pin 47 – CH5 with CH7.
Pin = HIGH (VDD) means IDLE is detected (no signal present).
Pin = LOW (GND) means ACTIVE (data signal present).
To monitor the RATE detect with two channels ORed (CH0 with CH2, CH1 with CH3, CH4 with CH6, CH5 with
CH7):
Write C0'h to address 0x4C.
The following RATE status should be observable on the external pins:
pin 19 – CH0 with CH2,
pin 20 – CH1 with CH3,
pin 46 – CH4 with CH6,
pin 47 – CH5 with CH7.
Pin = HIGH (VDD) means high data rate is detected (6 Gbps).
Pin = LOW (GND) means low rate is detected (3 Gbps).
Table 7. SMBus Register Map
Address Register Name Bit (s) Field Type Default Description
0x00 Reset 7:1 Reserved R/W 0x00 Set bits to 0.
0 Reset SMBus Reset
1: Reset registers to default value
0x01 PWDN Channels 7:0 PWDN CHx R/W 0x00 Power Down per Channel
[7]: CHA_3
[6]: CHA_2
[5]: CHA_1
[4]: CHA_0
[3]: CHB_3
[2]: CHB_2
[1]: CHB_1
[0]: CHB_0
00'h = all channels enabled
FF'h = all channels disabled
0x02 PWDN Control 7:1 Reserved R/W 0x00 Set bits to 0.
0 Override PWDN 0: Allow PWDN pin control
1: Block PWDN pin control
0x08 Pin Control Override 7:5 Reserved R/W 0x00 Set bits to 0.
4 Override IDLE 0: Allow IDLE pin control
1: Block IDLE pin control
3 Reserved Set bit to 0.
2 Override RATE 0: Allow RATE pin control
1: Block RATE pin control
1:0 Reserved Set bits to 0.
0x0E CH0 - CHB0 7:6 Reserved R/W 0x00 Set bits to 0.
IDLE RATE Select
5 IDLE auto 0: Allow IDLE_sel control in Bit 4
1: Automatic IDLE detect
4 IDLE select 0: Output is ON (SD is disabled)
1: Output is muted (electrical idle)
3:2 Reserved Set bits to 0.
1 RATE auto 0: Allow RATE_sel control in Bit 0
1: Automatic RATE detect
0 RATE select 0: 2.5 Gbps
1: 5.0 Gbps
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