
DS50PCI401
SNLS292J –JUNE 2009–REVISED APRIL 2013
www.ti.com
TIMING DIAGRAMS
Figure 3. CML Output Transition Times
Figure 4. Propagation Delay Timing Diagram
Figure 5. Idle Timing Diagram
14 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: DS50PCI401