Datasheet

DS50PCI401
www.ti.com SNLS292J –JUNE 2009–REVISED APRIL 2013
Electrical Characteristics — Serial Management Bus Interface
Over recommended operating supply and temperature ranges unless other specified.
Symbol Parameter Conditions Min Typ Max Units
SERIAL BUS INTERFACE DC SPECIFICATIONS
V
IL
Data, Clock Input Low Voltage 0.8 V
V
IH
Data, Clock Input High Voltage 2.1 3.6 V
I
PULLUP
Current Through Pull-Up Resistor High Power Specification
4 mA
or Current Source
V
DD
Nominal Bus Voltage 2.375 3.6 V
I
LEAK-Bus
Input Leakage Per Bus Segment
(1)
-200 +200 µA
I
LEAK-Pin
Input Leakage Per Device Pin -15 µA
C
I
Capacitance for SDA and SCL
(1) (2)
10 pF
R
TERM
External Termination Resistance Pullup V
DD
= 3.3V,
2000 Ω
pull to V
DD
= 2.5V ± 5% OR 3.3V ±
(1) (2) (3)
10%
Pullup V
DD
= 2.5V,
1000 Ω
(1) (2) (3)
SERIAL BUS INTERFACE TIMING SPECIFICATIONS. See Figure 7
FSMB Bus Operating Frequency
(4)
10 100 kHz
TBUF Bus Free Time Between Stop and
4.7 µs
Start Condition
THD:STA Hold time after (Repeated) Start At I
PULLUP
, Max
Condition. After this period, the first 4.0 µs
clock is generated.
TSU:STA Repeated Start Condition Setup
4.7 µs
Time
TSU:STO Stop Condition Setup Time 4.0 µs
THD:DAT Data Hold Time 300 ns
TSU:DAT Data Setup Time 250 ns
T
TIMEOUT
Detect Clock Low Timeout
(4)
25 35 ms
T
LOW
Clock Low Period 4.7 µs
T
HIGH
Clock High Period
(4)
4.0 50 µs
T
LOW
:SEXT Cumulative Clock Low Extend Time
(4)
2 ms
(Slave Device)
t
F
Clock/Data Fall Time
(4)
300 ns
t
R
Clock/Data Rise Time
(4)
1000 ns
t
POR
Time in which a device must be
(4)
500 ms
operational after power-on reset
(1) Recommended value. Parameter not tested in production.
(2) Recommended maximum capacitance load per bus segment is 400pF.
(3) Maximum termination voltage should be identical to the device supply voltage.
(4) Compliant to SMBus 2.0 physical layer specification. See System Management Bus (SMBus) Specification Version 2.0, section 3.1.1
SMBus common AC specifications for details.
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