Datasheet
DS50PCI401
SNLS292J –JUNE 2009–REVISED APRIL 2013
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Electrical Characteristics
Over recommended operating supply and temperature ranges with default register settings unless other specified.
(1) (2)
Symbol Parameter Conditions Min Typ Max Units
POWER
(3)
EQX=Float, DEX=0, VOD=1Vpp
758 950 mW
,PRSNT=0
PD Power Dissipation
PRSNT=1, ENSMB=0 0.92 1.125 mW
LVCMOS / LVTTL DC SPECIFICATIONS
V
IH
High Level Input
(4)
2 3.6
V
Voltage
V
IL
Low Level Input
(4)
0 0.8
V
Voltage
V
OH
High Level Output SMBUS open drain V
OH
set by
V
Voltage pullup Resistor
V
OL
Low Level Output I
OL
= 4mA 0.4
V
Voltage
I
IH
Input High Current V
IN
= 3.6V , LVCMOS -15 +15
μA
V
IN
= 3.6V , w/ -15 +120
FLOAT,PULLDOWN input
I
IL
Input Low Current V
IN
= 0V -15 +15
μA
V
IN
= 0V, w/FLOAT input -80 +15
CML RECEIVER INPUTS (IN_n+, IN_n-)
RL
RX-DIFF
Rx package plus Si 0.05GHz – 1.25GHz
(5)
-21
dB
differential return loss
1.25GHz – 2.5GHz
(5)
-20
RL
RX-CM
Common mode Rx 0.05GHz - 2.5GHz
(5)
-11.5 dB
return loss
Z
RX-DC
Rx DC common mode Tested at VDD=0
40 50 60 Ω
impedance
Z
RX-DIFF-DC
Rx DC differential Tested at VDD=0
85 100 115 Ω
impedance
V
RX-DIFF-DC
Differential Rx peak to Tested at DC, TXIDLEx=0
0.10 1.2 V
peak voltage
Z
RX-HIGH-IMP-DC -POS
DC Input CM Vin = 0 to 200 mV,
impedance for V>0 RXDETA/B = 0, 50 KΩ
ENSMB = 0, VDD=2.625
V
RX-IDLE-DET-DIFF-PP
Electrical Idle detect SD_TH = float, see Table 5,
40 175 mV
P-P
threshold
(6)
LPDS OUTPUTS (OUT_n+, OUT_n-)
V
TX-DIFF-PP
Output Voltage Swing Differential measurement with
OUT_n+ and OUT_n- terminated
800 1000 1200 mV
P-P
by 50Ω to GND AC-Coupled,
Figure 4,
(3)
V
OCM
Output Common-Mode Single-ended measurement DC-
V
DD
- 1.4 V
Voltage Coupled with 50Ω termination,
(1)
V
TX-DE-RATIO-3.5
Tx de-emphasis level VOD = 1000 mV, DEM1 = GND,
3.5 dB
ratio DEM0 = VDD,
(1)
,
(7)
(1) Typical values represent most likely parametric norms at V
DD
= 2.5V, T
A
= 25°C., and at the Recommended Operation Conditions at the
time of product characterization and are not guaranteed.
(2) The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not guaranteed.
(3) Measured with DEM Select pins configured for 1000mV VOD, see De-emphasis table.
(4) Input edge rate for LVCMOS/FLOAT inputs must be 50ns minimum from 10-90%.
(5) Input Return Loss also uses the setup shown in Figure 6. The blocking / biasing circuit is replaced with a simple AC coupling capacitor
for each input to emulate a typical PCIe application.
(6) Measured at package pins of receiver. Less than 40mV is IDLE, greater than 175mV is ACTIVE. SD_TH pin connected with resistor to
GND overrides this default setting.
(7) Measured with a repeating K28.5 pattern at a data rate of 2.5 Gbps and 5.0 Gbps.
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