Datasheet

DS36C200
www.ti.com SNLS111D –JUNE 1998–REVISED APRIL 2013
APPLICATION INFORMATION
TRUTH TABLES
The DS36C200 has two enable pins DE and RE*, however, the driver and receiver should never be enabled
simultaneously. Enabling both could cause multiple channel contention between the receiver output and the
driving logic. It is recommended to route the enables together on the PC board. This will allow a single bit
[DE/RE*] to control the chip. This DE/RE* bit toggles the DS36C200 between Receive mode and Transmit mode.
When the bit is asserted HIGH the device is in Transmit mode. When the bit is asserted LOW the device is in
Receive mode. The mode determines the function of the I/O pins: DI/RO, DO/RI+, and DO/RI−. Please note that
some of the pins have been identified by its function in the corresponding mode in the three tables below. For
example, in Transmit mode the DO/RI+ pin is identified as DO+. This was done for clarity in the tables only and
should not be confused with the pin identification throughout the rest of this document. Also note that a logic low
on the DE/RE* bit corresponds to a logic low on both the DE pin and the RE* pin. Similarly, a logic high on the
DE/RE* bit corresponds to a logic high on both the DE pin and the RE* pin.
Table 1. Receive Mode
(1)
Input(s) Input/Output
DE RE* [RI+] − [RI−] RO
L L > +100 mV H
L L < −100 mV L
L L 100 mV > & > −100 mV X
L H X Z
(1) H = Logic high level
L = Logic low level
X = Indeterminate state
Z = High impedance state
Table 2. Transmit Mode
(1)
Input(s) Input/Output
DE RE* DI DO+ DO−
H H L L H
H H H H L
H H 2 > & > 0.8 X X
L H X Z Z
(1) H = Logic high level
L = Logic low level
X = Indeterminate state
Z = High impedance state
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