Datasheet

DS34LV86T
SNLS115D JUNE 2000REVISED APRIL 2013
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SWITCHING CHARACTERISTICS
(1)(2)(3)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Units
t
PHL
Propagation Delay High to Low C
L
= 15 pF 6 17.5 35 ns
See (Figure 2 and
t
PLH
Propagation DeIay Low to High 6 17.8 35 ns
Figure 3 )
t
r
Rise Time (20% to 80%) 4.1 10 ns
t
f
Fall Time (80% to 20%) 3.3 10 ns
t
PHZ
Disable Time C
L
= 50 pF 40 ns
See (Figure 4 and
t
PLZ
Disable Time 40 ns
Figure 5)
t
PZH
Enable Time 40 ns
t
PZL
Enable Time 40 ns
t
SK1
Skew, |t
PHL
t
PLH
| See
(4)
C
L
= 15 pF 0.3 4 ns
t
SK2
Skew, Pin to Pin See
(5)
0.6 4 ns
t
SK3
Skew, Part to Part See
(6)
7 17 ns
f
MAX
Maximum Operating Frequency C
L
= 15 pF 32 MHz
See
(7)
(1) All typicals are given for: V
CC
= +3.3V, T
A
= +25°C.
(2) Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, Z
O
= 50Ω, t
r
10 ns, t
f
10 ns.
(3) C
L
includes probe and jig capacitance.
(4) t
SK1
is the |t
PHL
t
PLH
| of a channel.
(5) t
SK2
is the maximum skew between any two channels within a device, on either edge.
(6) t
SK3
is the difference in propagation delay times between any channels of any devices. This specification (maximum limit) applies to
devices within V
CC
±0.1V of one another,and a Delta T
A
= ±5°C (between devices) within the operating temperature range. This
parameter is specified by design and characterization.
(7) All channels switching, output duty cycle criteria is 40%/60% measured at 50% Input = 1V to 2V, 50% Duty Cycle, t
r
/t
f
5 ns. This
parameter is ensured by design and characterization.
PARAMETER MEASUREMENT INFORMATION
Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, Z
O
= 50Ω, t
r
10 ns, t
f
10 ns.
C
L
includes probe and jig capacitance.
Figure 2. Receiver Propagation Delay and Transition Time Test Circuit
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