Datasheet

TXIN4-
TXIN4+
TXIN3-
TXIN3+
TXIN2-
TXIN2+
TXIN1-
TXIN1+
TXIN0-
TXIN0+
TXCLKIN-
TXCLKIN+
VDD33 1
N/C 2
GPIO0 3
GPIO1 4
5
6
7
8
9
10
11
12
DC_B
RS
VDD25
N/C
DE_EMPH0
DE_EMPH1
GPIO2
N/C
VDD3336
VDD2535
SMB_CS34
SCK33
32
31
30
29
28
27
26
25
SDA
LOCK
RESET
RSVD
VDDPLL
LF_CP
LF_REF
VDD25
48
47
46
45
44
43
42
41
40
39
38
37N/C 24
N/C 23
N/C 22
N/C 21
20
19
18
17
16
15
14
13
N/C
N/C
VDD25
TXOUT0-
TXOUT0+
VDD25
VOD_CTRL
N/C
49 DAP = GND
DS32EL0421
FPGA
LVDS Interface
D0
DS32ELX0421
3.125 Gbps Data Payload
System Logic
LVDS Interface
5 LVDS
ControlPLL
Parallel to Serial
Encoder
LVDS
Clock
LVDS Interface
LVDS Interface
Control
SMBus
Redundant
Driver
R0
R1
DS32ELX0124
Serial to Parallel
LVDS Interface
LVDS Interface
PLL Control
LVDS
Clock
Control
SMBus
5 LVDS
FPGA
System Logic
Redundant Link
D1
RT0
Retimed
Output
DS32EL0421, DS32ELX0421
SNLS282F MAY 2008REVISED APRIL 2013
www.ti.com
Typical Application
Connection Diagram
See Package Number RHS0048A
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