Datasheet

DS32EL0124, DS32ELX0124

SNLS284K –MAY 2008–REVISED APRIL 2013

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PIN DESCRIPTIONS (continued)

Pin Name Pin Number I/O, Type Description

Control Pins

LT_EN 2 I, LVCMOS DS32ELX0124 only. When held high, retimed serialized high speed output

is enabled.

RX_MUX_SEL 12 I, LVCMOS DS32ELX0124 only. RX_MUX_SEL selects the input of the deserializer.

0 = RxIN0+/- selected

1 = RxIN1+/- selected

VOD_CTRL 14 I, LVCMOS DS32ELX0124 only. VOD control. The deserializer loop through output

amplitude can be adjusted by connecting this pin to a pull-down resistor.

The value of the pull-down resistor determines the VOD. See LOOP

THROUGH DRIVER LAUNCH AMPLITUDE for more details.

DC_B 5 I, LVCMOS DC-balance and Remote Sense pins. See Applications Information for

RS 6 device behavior.

RESET 30 I, LVCMOS Reset pin. When held low, reset the device.

0 = Device Reset

1 = Normal operation

LOCK 31 O, LVCMOS Lock indication output. pin goes low when the deserializer is locked to the

incoming data stream and begins to output data and clock on RxOUT and

RxCLKOUT respectively.

0 = Deserializer locked

1 = Deserializer not locked

SMBus

SCK I, SMBus 33 SMBus compatible clock.

SDA I/O, SMBus 32 SMBus compatible data line.

SMB_CS I, SMBus 34 SMBus chip select. When held high, SMBus management control is

enabled.

Other

GPIO0 3 I/O, LVCMOS Software configurable IO pins.

GPIO1 4 I/O, LVCMOS Software configurable IO pins.

GPIO2 11 I/O, LVCMOS Software configurable IO pins.

NC 2 ,8, 9, 10, 12, 13, 14, 19, Misc. No Connect, for DS32EL0124

20, 21, 22, 23, 24, 29

8, 9, 10, 13, 23, 24, 29 Misc No Connect, for DS32ELX0124

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Product Folder Links: DS32EL0124 DS32ELX0124