Datasheet

IDLE
LINK DETECT
LINK
ACQUISITION
NORMAL
Power-On/Reset
CLOCK
ACQUISITION
RxIN
detected
RxIN detected
and
(RS:1, DC_B:0
or
RS:1, DC_B:1)
Clock
Recovered
Link
Acquired
RxIN does not Exist
or
CDR Not Locked
or
Link Not Acquired
Or
Excessive Bit Errors
CDR Locked
and
(RS:1, DC_B:0
or
RS:1, DC_B:1)
DS32EL0124, DS32ELX0124
SNLS284K –MAY 2008–REVISED APRIL 2013 www.ti.com
Figure 9. Deserializer State Diagram
DESCRAMBLER AND NRZI DECODER
The CDR of the deserializer expects a transition density of 20% for a period of 200 μs. To improve the transition
density of the data, the scrambler and NRZI encoder, which are integrated features in the DS32EL0421 and
DS32ELX0421, serializers can be enabled. If the descrambler is enabled, the serialized data is descrambled
after being recovered by the CDR to according to the polynomial specified in the DS32EL0421 datasheet. Using
the scrambler/descrambler helps to lower EMI emissions by spreading the spectrum of the data. Scrambling also
creates transitions for a deserializer’s CDR to properly lock onto.
The scrambler is enabled or disabled by default depending on how the DC_B and RS pins are configured. To
override the default scrambler setting two register writes must be performed. First, write to register 22’h and set
bit 5 to unlock the descrambler register. Next write to register 21’h and change bit 5 to the desired value. Please
note that NRZI decoder has its own control bits in registers 22'h and 21'h.
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