Datasheet

50: MS
50: MS
50: MS
50: MS
L=1" L=1"
L=1"L=1"
L = A, B or C
100: Diff.
Stripline
50:
Microstrip
L=4"
L=4"
L=4"
L=4"
TEST
CHANNEL
DS25BR204
CHARACTERIZATION BOARD
¼ DS25BR204
PATTERN
GENERATOR
OSCILLOSCOPE
50:
Microstrip
50:
Microstrip
50:
Microstrip
TEST
CHANNEL
DS25BR204
www.ti.com SNLS259D –NOVEMBER 2007–REVISED MARCH 2013
Figure 8. Pre-Emphasis and Equalization Performance Test Circuit
Figure 9. Test Channel Block Diagram
Test Channel Loss Characteristics
The test channel was fabricated with Polyclad PCL-FR-370-Laminate/PCL-FRP-370 Prepreg materials (Dielectric
constant of 3.7 and Loss Tangent of 0.02). The edge coupled differential striplines have the following geometries:
Trace Width (W) = 5 mils, Gap (S) = 5 mils, Height (B) = 16 mils.
Test Channel Length Insertion Loss (dB)
(inches)
500 MHz 750 MHz 1000 MHz 1250 MHz 1500 MHz 1560 MHz
A 10 -1.2 -1.7 -2.0 -2.4 -2.7 -2.8
B 20 -2.6 -3.5 -4.1 -4.8 -5.5 -5.6
C 30 -4.3 -5.7 -7.0 -8.2 -9.4 -9.7
D 15 -1.6 -2.2 -2.7 -3.2 -3.7 -3.8
E 30 -3.4 -4.5 -5.6 -6.6 -7.7 -7.9
F 60 -7.8 -10.3 -12.4 -14.5 -16.6 -17.0
Functional Description
The DS25BR204 is a 3.125 Gbps 1:4 LVDS repeater optimized for high-speed signal routing and switching over
lossy FR-4 printed circuit board backplanes and balanced cables.
The DS25BR204 SEL_in pin selects one out of two available LVDS inputs. The following is the input select truth
tables.
Table 1. Input Select Truth Table
CONTROL Pin (SEL_in) State Input Selected
0 IN1
1 IN2
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