Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - buffer amplifiers, repeaters LVDS 3.125 GBit/s WSON 8

ASIC / FPGA

CML

LVDS

LVPECL

ASIC / FPGA

LVDS

BR150

DS25BR150

www.ti.com

SNLS257E –APRIL 2007–REVISED APRIL 2013

DS25BR150 3.125 Gbps LVDS Buffer

Check for Samples: DS25BR150

FEATURES

DESCRIPTION

The DS25BR150 is a single channel 3.125 Gbps

• DC - 3.125 Gbps Low Jitter, High Noise

LVDS buffer optimized for high-speed signal

Immunity, Low Power Operation

transmission over printed circuit boards and balanced

• On-Chip 100 Ω Input and Output Termination

cables. Fully differential signal paths ensure

Minimizes Insertion and Return Losses,

exceptional signal integrity and noise immunity.

Reduces Component Count and Minimizes

The DS25BR150 is a buffer/repeater with very low

Board Space

power consumption. Other LVDS devices with similar

• 7 kV ESD on LVDS I/O Pins Protects Adjoining

IO characteristics and with signal conditioning

Components

features include the following products. The

DS25BR110 features four levels of equalization for

• Small 3 mm x 3 mm WSON-8 Space Saving

use as an optimized receiver device, the DS25BR120

Package

features four levels of pre-emphasis for use as an

optimized driver device, and the DS25BR100 features

APPLICATIONS

both pre-emphasis and equalization for use as an

• Clock or Data Buffering / Repeating

optimized repeater device.

• OC-48 / STM-16 Clock or Data Buffering /

Wide input common mode range allows the receiver

Repeating

to accept signals with LVDS, CML and LVPECL

• InfiniBand levels; the output levels are LVDS. A very small

package footprint requires a minimal space on the

• FireWire

board while the flow-through pinout allows easy board

layout. The differential inputs and outputs are

internally terminated with a 100Ω resistor to lower

device input and output return losses, reduce

component count, and further minimize board space.

Typical Application

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (14 pages)

PAGE 1
DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 DS25BR150 3.125 Gbps LVDS Buffer Check for Samples: DS25BR150 FEATURES DESCRIPTION • The DS25BR150 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over printed circuit boards and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity. 1 2 • • • DC - 3.
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DS25BR150 SNLS257E – APRIL 2007 – REVISED APRIL 2013 www.ti.com Block Diagram IN+ OUT+ IN- OUT- Pin Diagram NC 1 IN+ 2 IN- 3 NC 4 8 VCC DAP 7 OUT+ GND 6 OUT- 5 NC WSON Package PIN DESCRIPTION Pin Name Pin Name Pin Type Pin Description NC 1 NA "NO CONNECT" pin. IN+ 2 Input Non-inverting LVDS input pin. IN- 3 Input Inverting LVDS input pin. NC 4 NA "NO CONNECT" pin. NC 5 NA "NO CONNECT" pin. OUT- 6 Output Inverting LVDS output pin.
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DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 Absolute Maximum Ratings (1) (2) Supply Voltage (VCC) −0.3V to +4V LVDS Input Voltage (IN+, IN−) −0.3V to +4V Differential Input Voltage |VID| 1V −0.3V to (VCC + 0.3V) LVDS Output Voltage (OUT+, OUT−) LVDS Differential Output Voltage ((OUT+) - (OUT−)) 0V to 1V LVDS Output Short Circuit Current Duration 5 ms Junction Temperature +150°C −65°C to +150°C Storage Temperature Range Lead Temperature Range Soldering (4 sec.
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DS25BR150 SNLS257E – APRIL 2007 – REVISED APRIL 2013 www.ti.com DC Electrical Characteristics (continued) Over recommended operating supply and temperature ranges unless otherwise specified.(1)(2)(3) Symbol Parameter Conditions Min Typ Max Units 1 V 0 +100 mV LVDS INPUT DC SPECIFICATIONS (IN+, IN-) VID Input Differential Voltage VTH Differential Input High Threshold 0 VTL Differential Input Low Threshold VCMR Common Mode Voltage Range VID = 100 mV IIN Input Current VIN = 3.
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DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 DC TEST CIRCUITS VOH OUT+ IN+ Power Supply R D RL Power Supply IN- OUTVOL Figure 1. Differential Driver DC Test Circuit AC Test Circuits and Timing Diagrams OUT+ IN+ R Signal Generator D IN- RL OUT- Figure 2. Differential Driver AC Test Circuit Figure 3. Propagation Delay Timing Diagram Figure 4.
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DS25BR150 SNLS257E – APRIL 2007 – REVISED APRIL 2013 www.ti.com Device Operation INPUT INTERFACING The DS25BR150 accepts differential signals and allows simple AC or DC coupling. With a wide common mode range, the DS25BR150 can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML). The following three figures illustrate typical DC-coupled interface to common differential drivers. Note that the DS25BR150 inputs are internally terminated with a 100Ω resistor.
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DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 100: Differential T-Line OUT+ DS25BR150 IN+ CML or LVPECL or LVDS 100: IN- OUT- Figure 9.
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DS25BR150 SNLS257E – APRIL 2007 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics 60 TOTAL RESIDUAL JITTER (ps) VCC = 3.3V 50 TA = 25°C NRZ PRBS-7 2.5 Gbps 40 VICM = 1.0V 30 20 VICM = 2.4V 10 0 0.25 0.40 0.55 0.70 0.85 1.00 DIFFERENTIAL INPUT VOLTAGE (V) Figure 10. A 2.5 Gbps NRZ PRBS-7 Output Eye Diagram V:100 mV / DIV, H:75 ps / DIV Figure 11. Total Jitter as a Function of Input Amplitude 60 TOTAL RESIDUAL JITTER (ps) VCC = 3.3V 50 40 TA = 25°C NRZ PRBS-7 3.
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DS25BR150 www.ti.com SNLS257E – APRIL 2007 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision D (April 2013) to Revision E • Page Changed layout of National Data Sheet to TI format ............................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DS25BR150TSD/NOPB WSON NGQ 8 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 DS25BR150TSDX/NOPB WSON NGQ 8 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS25BR150TSD/NOPB WSON NGQ 8 1000 213.0 191.0 55.0 DS25BR150TSDX/NOPB WSON NGQ 8 4500 367.0 367.0 35.
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MECHANICAL DATA NGQ0008A SDA08A (Rev A) www.ti.
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