Datasheet

PE1
IN+
IN-
PE0
VCC
OUT+
OUT-
NC
1
2
3
4
8
6
5
7
GND
DAP
PE1
OUT+
OUT-
PE0
IN+
IN-
DS25BR120
SNLS256E –MARCH 2007–REVISED APRIL 2013 www.ti.com
Block Diagram
Pin Diagram
WSON Package
PIN DESCRIPTIONS
Pin Name Pin Name Pin Type Pin Description
PE1 1 Input Pre-emphasis select pin.
IN+ 2 Input Non-inverting LVDS input pin.
IN- 3 Input Inverting LVDS input pin.
PE0 4 Input Pre-emphasis select pin.
NC 5 NA "NO CONNECT" pin.
OUT- 6 Output Inverting LVDS output pin.
OUT+ 7 Output Non-inverting LVDS Output pin.
VCC 8 Power Power supply pin.
GND DAP Power Ground pad (DAP - die attach pad)
Pre-Emphasis Truth Table
PE1 PE0 Pre-emphasis Level
0 0 Off
0 1 Low (Approx. 3 dB at 1.56 GHz)
1 0 Medium (Approx. 6 dB at 1.56 GHz)
1 1 High (Approx. 9 dB at 1.56 GHz)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Product Folder Links: DS25BR120