Datasheet
V
DD
GND
V
DD
ENL_0
PREL_0
V
DD
LO_0+
LO_0-
LI_0+
LI_0-
MUX_S0
V
DD
48
47
46
45
44
43
42
41
40
39
38
37
ENA_1
ENB_1
SOA_1+
SOA_1-
SOB_1+
SOB_1-
SIA_1+
SIA_1-
SIB_1+
SIB_1-
PREA_1
PREB_1
13
14
15
16
17
18
19
20
21
22
23
24
V
DD
MUX_S1
LI_1-
LI_1+
LO_1-
LO-1+
V
DD
PREL_1
ENL_1
GND
V
DD
N/C
12 11 10 9 8 7 6 5 4 3 2 1
PREB_0
PREA_0
SIB_0-
SIB_0+
SIA_0-
SIA_0+
SOB_0-
SOB_0+
SOA_0-
SOA_0+
ENB_0
ENA_0
25 26 27 28 29 30 31 32 33 34 35 36
DAP
(GND)
V
DD
GND
V
DD
ENL_0
PREL_0
V
DD
LO_0+
LO_0-
LI_0+
LI_0-
MUX_S0
V
DD
ENA_1
ENB_1
SOA_1+
SOA_1-
SOB_1+
SOB_1-
SIA_1+
SIA_1-
SIB_1+
SIB_1-
PREA_1
PREB_1
V
DD
MUX_S1
LI_1-
LI_1+
LO_1-
LO-1+
V
DD
PREL_1
ENL_1
GND
V
DD
N/C
PREB_0
PREA_0
SIB_0-
SIB_0+
SIA_0-
SIA_0+
SOB_0-
SOB_0+
SOA_0-
SOA_0+
ENB_0
ENA_0
Channel 0
Channel 1
DS15MB200
www.ti.com
SNLS196E –NOVEMBER 2005–REVISED MARCH 2013
PIN DESCRIPTIONS (continued)
Pin WQFN Pin
I/O, Type Description
Name Number
DIGITAL CONTROL INTERFACE
MUX_S0 38 I, LVTTL Mux Select Control Inputs (per channel) to select which Switch-side input, A or B, is passed through
MUX_S1 11 to the Line-side.
PREA_0 26 I, LVTTL Output pre-emphasis control for Switch-side outputs. Each output driver on the Switch A-side and B-
PREA_1 23 side has a separate pin to control the pre-emphasis on or off.
PREB_0 25
PREB_1 24
PREL_0 44 I, LVTTL Output pre-emphasis control for Line-side outputs. Each output driver on the Line A-side and B-side
PREL_1 5 has a separate pin to control the pre-emphasis on or off.
ENA_0 36 I, LVTTL Output Enable Control for Switch A-side and B-side outputs. Each output driver on the A-side and
ENA_1 13 B-side has a separate enable pin.
ENB_0 35
ENB_1 14
ENL_0 45 I, LVTTL Output Enable Control for The Line-side outputs. Each output driver on the Line-side has a separate
ENL_1 4 enable pin.
POWER
V
DD
2, 6, 12, I, Power V
DD
= 3.3V ±0.3V.
37, 43, 46,
48
GND 3, 47
(3)
I, Power Ground reference for LVDS and CMOS circuitry.
For the WQFN package, the DAP is used as the primary GND connection to the device. The DAP is
the exposed metal contact at the bottom of the WQFN-48 package. It should be connected to the
ground plane with at least 4 vias for optimal AC and thermal performance.
(3) Note that the DAP on the backside of the WQFN package is the primary GND connection for the device when using the WQFN
package.
Connection Diagrams
Figure 3. WQFN Top View Figure 4. Directional Signal Paths Top View
DAP = GND (Refer to pin names for signal polarity)
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