Datasheet

OUT+
OUT-
CML3.3V
IN+
IN-
50:
50:
V
CC
DS15EA101 Output
100:
100: Differential T-Line
OUT+
OUT-
LVDS
IN+
IN-
100:
50:50:
V
CC
DS15EA101 Output
100: Differential T-Line
DS15EA101
www.ti.com SNLS235H –SEPTEMBER 2006–REVISED APRIL 2013
DEVICE OPERATION
Input Interfacing
The DS15EA101 accepts either differential or single-ended input. The input must be AC coupled. Transformer
coupling is not supported. If the signal is differential, its amplitude must be 800 mVp-p ±10% (400 mV single-
ended). If the signal is single-ended, its amplitude must be 800 mV ±10%.
Output Interfacing
The DS15EA101 uses current mode outputs. They are internally terminated with 50Ω. The following two figures
illustrate typical DC-coupled interface to common differential receivers and assume that the receivers have high
impedance inputs. While most receivers have an input common mode voltage range that can accomodate CML
signals, it is recommended to check respective receiver's datasheet prior to implementing the suggested
interface implementations.
Figure 1. Typical DS15EA101 Output DC-Coupled Interface to an LVDS Receiver
Figure 2. Typical DS15EA101 Output DC-Coupled Interface to a CML Receiver
Cable Extender Application
The DS15EA101 together with the DS15BA101 form a cable extender chipset optimized for extending serial data
streams from serializer/deserializer (SerDes) pairs and field programmable gate arrays (FPGAs) over 100Ω
differential (i.e. CAT5e/6/7 and twinax) and 50Ω coaxial cables. Setting correct DS15BA101 output amplitude and
proper cable termination are keys for optimal operation. The following two figures show recommended chipset
configuration for 100Ω differential and 50Ω coaxial cables.
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