Datasheet

DS15BA101
OUT-
IN+
IN-
OUT+
0.1 PF
50:
50:
487:
100:
1 PF
1 PF
1 PF
DS15EA101
IN+
IN-
50:
1 PF
OUT+
OUT-
CAP+ CAP-
0.1 PF
V
CC
V
CC
25:
50: Coaxial Cable
R
VO
DS15BA101
OUT-
IN+
IN-
OUT+
0.1 PF
50:
50:
953:
100:
1 PF
1 PF
1 PF
1 PF
DS15EA101
IN+
IN-
100:
1 PF
OUT+
OUT-
CAP+ CAP-
0.1 PF
V
CC
V
CC
100: Differential TP Cable
R
VO
OUT+
OUT-
CML or
LVPECL or
LVDS
IN+
IN-
50:
50:
V
CC
100:
100: Differential T-Line
DS15BA101
DS15BA101
www.ti.com SNLS234J –OCTOBER 2006–REVISED APRIL 2013
Figure 5. Typical DS15BA101 Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver
CABLE EXTENDER APPLICATION
The DS15BA101 together with the DS15EA101 form a cable extender chipset optimized for extending serial data
streams from serializer/deserializer (SerDes) pairs and field programmable gate arrays (FPGAs) over 100Ω
differential (i.e. CAT5e/6/7 and twinax) and 50Ω coaxial cables. Setting correct DS15BA101 output amplitude and
proper cable termination are keys for optimal operation. The following two figures show recommended chipset
configuration for 100Ω differential and 50Ω coaxial cables.
Figure 6. Cable Extender Chipset Connection Diagram for 100Ω Differential Cables
Figure 7. Cable Extender Chipset Connection Diagram for 50Ω Coaxial Cables
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: DS15BA101