Datasheet

t
PLHD
t
PHLD
OUT diff
IN diff 0V
0V
0V
20%
80%
80%
20%
OUT diff = (OUT+) ± (OUT-)
t
F
t
R
Signal
Source
Media A Media B Scope
TPA TPB TPC TPD
1/4 DS100BR410
DS100BR410
www.ti.com SNLS326B –OCTOBER 2010–REVISED APRIL 2013
Electrical Characteristics — Serial Management Bus Interface (continued)
Over recommended operating supply and temperature ranges unless other specified.
(1)
Parameter Test Conditions Min Typ Max Units
T
SU:DAT
Data Setup Time 250 ns
T
LOW
Clock Low Period 4.7 µs
T
HIGH
Clock High Period 4.0 50 µs
t
F
Clock/Data Fall Time 300 ns
t
R
Clock/Data Rise Time 1000 ns
t
POR
Time in which a device must be
500 ms
operational after power-on reset
AC WAVEFORMS AND TEST CIRCUITS
Figure 1. Test Setup Diagram
Figure 2. Output Transition Times
Figure 3. Propagation Delay Timing Diagram
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