Datasheet

DS100BR410
www.ti.com SNLS326B –OCTOBER 2010–REVISED APRIL 2013
Table 4. DS100BR410 Register Map (continued)
ADD Default
REG Name Bit(s) Field Type Description
(hex) (binary)
07 Port/Channel 7:6 Reserved R/W 00
Select and
5:4 Port/Channel Select for R/W 00 Select port/channel [1:0] to report status in
Enable SMBus
Status REG_01 to REG_03
Registers
00 = port0 (CH0)
01 = port1 (CH1)
10 = port2 (CH2)
11 = port3 (CH3)
3:1 Reserved R/W 000
0 SMBUS Channel EN and EQ R/W 0 Channel EN and EQ Boost through pins or
boost smbus REG_13 to REG_1A
0 = Channel EN[3:0] and EQ BST[2:0] boost
set by external pins
1 = Allow channel EN and EQ boost to be
set by SMBus Register bits: REG_13 to
REG_1A
08 Driver V
OD
7 Reserved R/W 0
Control
6:4 Reserved R/W 111
3:2 VOD Control R/W 10 00 = 0.6 Vp-p
01 = 0.8 Vp-p
10 = 1.0 Vp-p
11 = 1.2 Vp-p
1:0 Reserved R/W 00
09 – 10 Reserved 7:0 Reserved R/W 00000000
11 De-Emphasis 7:6 DEM_CH3 R/W 00 00 = 0 dB
Control 01 = -3 dB
5:4 DEM_CH2 R/W 00
10 = -6 dB
3:2 DEM_CH1 R/W 00
11 = -9 dB
1:0 DEM_CH0 R/W 00
12 OOB Signal 7:3 Reserved R/W 00000
Detect Control
2:1 Reserved R/W 11
0 OOB Signal Detect Control R/W 0 0 = OOB signal detect enabled
1 = OOB signal detect disabled
13 Channel 3 7:5 Reserved R/W 000
EN and EQ
4 Channel Enable R/W 1 0 = Disabled
Control
1 = Enabled
3:1 Reserved R/W 000
0 Boost[8] R/W 0 See Table 5
14 EQ Control 7:0 Boost[7:0] R/W 00000000 See Table 5
Channel 3
15 Channel 2 7:5 Reserved R/W 000
EN and EQ
4 Channel Enable R/W 1 0 = Disabled
Control
1 = Enabled
3:1 Reserved R/W 000
0 Boost[8] R/W 0 See Table 5
16 EQ Control 7:0 Boost[7:0] R/W 00000000 See Table 5
Channel 2
17 Channel 1 7:5 Reserved R/W 000
EN and EQ
4 Channel Enable R/W 1 0 = Disabled
Control
1 = Enabled
3:1 Reserved R/W 000
0 Boost[8] R/W 0 See Table 5
18 EQ Control 7:0 Boost[7:0] R/W 00000000 See Table 5
Channel 1
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