Datasheet

DS100BR111
SNLS338E –JANUARY 2011–REVISED FEBRUARY 2013 www.ti.com
Table 9. SMBus Register Map (continued)
Register EEPROM
Address Bits Field Type Default Description
Name Reg Bit
0x18 CH B 7:5 Reserved R 0x82 Set bits to = 100'b
Control 2
4 Reserved R/W Set bit to 0
3 Reserved Set bit to 0
2:0 DEM [2:0] Yes De-Emphasis (Default = -3.5 dB)
000'b = -0.0 dB
001'b = -1.5 dB
010'b = -3.5 dB
011'b = -6.0 dB
100'b = -8.0 dB
101'b = -9.0 dB
110'b = -10.5 dB
111'b = -12.0 dB
0x19 CH B 7 Slow OOB R/W 0x00 Yes Slow OOB Enable (1); Disable (0)
Idle
6:4 Reserved Set bits to 000'b.
Threshold
3:2 IDLE thA[1:0] Yes Assert Thresholds
Use only if register 0x08 [6] = 1
00 = 180 mV (Default)
01 = 160 mV
10 = 210 mV
11= 190 mV
1:0 IDLE thD[1:0] Yes De-assert Thresholds
Use only if register 0x08 [6] = 1
00 = 110 mV (Default)
01 = 100 mV
10 = 150 mV
11= 130 mV
0x23 CH A VOD 7:6 Reserved R/W 0x00 Set bits to 00'b.
Control
4:2 VOD_CH0[2:0] Yes DS100BR111 VOD Controls for CH A (Default =
000'b)
000'b = 700 mV
001'b = 800 mV
010'b = 900 mV
011'b = 1000 mV
100'b = 1100 mV
101'b = 1200 mV
110'b = 1300 mV
1:0 Reserved Set bits to 00'b.
0x25 Reserved 7:5 Reserved R/W 0xAD Set bits to 101'b.
4:2 Reserved Yes Set bits to 011'b.
1:0 Reserved Set bits to 01'b.
0x28 Idle Control 7 Reserved R/W 0x00
6 Override Fast Idle Yes
5:4 en_high_idle_th[1: Yes Enable high SD thresholds
0] [5]: CH A
[4]: CH B
3:2 en_fast_idle[1:0] Yes Enable Fast IDLE
[3]: CH A
[2]: CH B
1:0 Reserved Yes Set bits to 00'b.
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