Datasheet

DS100BR111
www.ti.com SNLS338E –JANUARY 2011–REVISED FEBRUARY 2013
Table 9. SMBus Register Map (continued)
Register EEPROM
Address Bits Field Type Default Description
Name Reg Bit
0x11 CH A 7:5 Reserved R 0x82 Set bits to = 100'b
Control 2
4 Reserved R/W Set bit to 0
3 Reserved Set bit to 0
2:0 DEM [2:0] Yes De-Emphasis (Default = -3.5 dB)
000'b = -0.0 dB
001'b = -1.5 dB
010'b = -3.5 dB
011'b = -6.0 dB
100'b = -8.0 dB
101'b = -9.0 dB
110'b = -10.5 dB
111'b = -12.0 dB
0x12 CH A 7 Slow OOB R/W 0x00 Yes Slow OOB Enable (1); Disable (0)
Idle
6:4 Reserved Set bits to 000'b.
Threshold
3:2 IDLE thA[1:0] Yes Assert Thresholds
Use only if register 0x08 [6] = 1
00 = 180 mV (Default)
01 = 160 mV
10 = 210 mV
11= 190 mV
1:0 IDLE thD[1:0] Yes De-assert Thresholds
Use only if register 0x08 [6] = 1
00 = 110 mV (Default)
01 = 100 mV
10 = 150 mV
11= 130 mV
0x13 CH B 7 Reserved R/W 0x00 Set bit to 0
Analog
6 Reserved Set bit to 0
Override 1
5 Reserved Set bit to 0
4 Reserved Set bit to 0
3:0 Reserved Set bits to 0000'b.
0x14 CH B 7:0 Reserved R/W 0x00 Set bits to 00'h.
Reserved
0x15 CH B 7:6 Reserved R/W 0x00 Set bits to 00'b
Idle Control
5 Idle Auto Yes Auto IDLE value when override bit is set (reg
0x08 [4] = 1)
4 Idle Select Yes Force IDLE value when override bit is set (reg
0x08 [4] = 1)
3:2 Reserved Yes Set bits to 00'b.
1:0 Reserved Set bits to 00'b.
0x16 CH B 7:0 BOOST [7:0] R/W 0x2F Yes EQ Boost Default to 24 dB
EQ Setting See Table 2 for Information
0x17 CH B 7 Sel_scp R/W 0xED Yes 1 = Short Circuit Protection ON
Control 1 0 = Short Circuit Protection OFF
6 Output Mode Yes [1]: Normal operation
[0]: 10G-KR operation
5:3 Reserved Yes Set bits to = 101'b
2:0 Reserved Set bits to = 101'b
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