Datasheet

DS100BR111A
www.ti.com
SNLS400C JANUARY 2012REVISED APRIL 2013
Electrical Characteristics Serial Management Bus Interface
Over recommended operating supply and temperature ranges unless other specified.
Parameter Test Conditions Min Typ Max Units
SERIAL BUS INTERFACE DC SPECIFICATIONS:
(1)
V
IL
Data, Clock Input Low Voltage 0.8 V
V
IH
Data, Clock Input High Voltage 2.1 3.6 V
I
PULLUP
Current Through Pull-Up Resistor High Power Specification
4 mA
or Current Source
V
DD
Nominal Bus Voltage 2.375 3.6 V
I
LEAK-Bus
Input Leakage Per Bus Segment See
(2)
-200 +200 µA
C
I
Capacitance for SDA and SCL See
(2) (3) (4)
10 pF
R
TERM
External Termination Resistance Pullup V
DD
= 3.3V,
(2) (3) (5)
2000
pull to V
DD
= 2.5V ± 5% OR 3.3V ±
Pullup V
DD
= 2.5V,
(2) (3) (5)
1000
10%
SERIAL BUS INTERFACE TIMING SPECIFICATIONS
FSMB Bus Operating Frequency ENSMB = VDD (Slave Mode) 400 kHz
ENSMB = FLOAT (Master Mode)
280 400 520 kHz
(6)
TBUF Bus Free Time Between Stop and
1.3 µs
Start Condition
THD:STA Hold time after (Repeated) Start At I
PULLUP
, Max
Condition. After this period, the first 0.6 µs
clock is generated.
TSU:STA Repeated Start Condition Setup
0.6 µs
Time
TSU:STO Stop Condition Setup Time 0.6 µs
THD:DAT Data Hold Time 0 ns
TSU:DAT Data Setup Time 100 ns
T
LOW
Clock Low Period 1.3 µs
T
HIGH
Clock High Period See
(1)
0.6 50 µs
t
F
Clock/Data Fall Time See
(1)
300 ns
t
R
Clock/Data Rise Time See
(1)
300 ns
t
POR
Time in which a device must be See
(1)(4)
500 ms
operational after power-on reset
(1) Compliant to SMBus 2.0 physical layer specification. See System Management Bus (SMBus) Specification Version 2.0, section 3.1.1
SMBus common AC specifications for details.
(2) Recommended value.
(3) Recommended maximum capacitance load per bus segment is 400pF.
(4) Ensured by Design. Parameter not tested in production.
(5) Maximum termination voltage should be identical to the device supply voltage.
(6) EEPROM interface requires 400 KHz capable EEPROM device.
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