Datasheet
DS100BR111A
SNLS400C –JANUARY 2012–REVISED APRIL 2013
www.ti.com
Electrical Characteristics
Parameter Test Conditions Min Typ Max Units
POWER SUPPLY CURRENT
IDD Supply Current TX_DIS = LOW, EQ = ON 50 63
VOD_SEL = Float ( 1000 mV)
Auto Low Power Mode 12 15
TX_DIS = LOW, MODE = 20K mA
VID CHA and CHB = 0.0V
VOD_SEL = Float (1000 mV)
TX_DIS = HIGH (BR111A) 25 35
LVCMOS DC SPECIFICATIONS
V
IH
Voltage Input High 2.0 VDD V
V
IL
Voltage Input Low GND 0.7 V
V
OH
Voltage Output High I
OH
= -4.0 mA
(1)
2.0 V
V
OL
Voltage Output Low I
OL
= 4.0 mA 0.4 V
I
IN
Input Leakage Current Vinput = 0V or VDD -15 +15 uA
VDD_SEL = Float
Vinput = 0V or VIN -15 -15
VDD_SEL = Low
I
IN-P
Input Leakage Current Vinput = 0V or VDD - 0.05V -160 +80 uA
4-Level Input
(2)
VDD_SEL = Float
Vinput = 0V or VIN - 0.05V
VDD_SEL = Low
LOS AND ENABLE / DISABLE TIMING
T
LOS_OFF
Input IDLE to Active See
(3)
0.035 uS
RX_LOS response time
T
LOS_ON
Input Active to IDLE See
(3)
0.4 uS
RX_LOS response time
T
OFF
TX Disable assert Time See
(3)
0.005 uS
TX_DIS = HIGH to Output OFF
T
ON
TX Disable negateTime See
(3)
0.150 uS
TX_DIS = LOW to Output ON
T
LP_EXIT
Auto Low Power Exit See
(3)
150 nS
ALP to Normal Operation
T
LP_ENTER
Auto Low Power Enter See
(3)
100 uS
Normal Operation to Auto Low
Power
CML RECEIVER INPUTS
V
TX
Source Transmit Launch Signal Default power-up conditions 190 800 1600 mV
Level ENSMB = 0 or 1
RL
RX-IN
RX return loss SDD11 @ 4.1 GHz -12 dB
SDD11 @ 11.1 GHz -8
SCD11 @ 11.1 GHz -10
(1) Typical jitter reported is determined by jitter decomposition software on the DSA8200 Oscilloscope.
(2) Input is held to a maximum of 50 mV below VDD or VIN to simulate the use of a 1K resistor on the input.
(3) Parameter not tested in production.
6 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: DS100BR111A