Datasheet

DS100BR111A
SNLS400C –JANUARY 2012–REVISED APRIL 2013 www.ti.com
Table 7. Single EEPROM Header + Register Map with Default Value (continued)
EEPROM
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 BIt 0
Address Byte
Description 33 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Register
Value 0 0 0 0 0 1 0 1
Description 34 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Register
Value 1 1 1 1 0 1 0 1
Description 35 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Register
Value 1 0 1 0 1 0 0 0
Description 36 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Register
Value 0 0 0 0 0 0 0 0
Description 37 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Register
Value 0 0 0 0 0 0 0 0
Description 38 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Register
Value 0 1 0 1 0 1 0 0
Description 39 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Register
Value 0 1 0 1 0 1 0 0
Below is an example of a 2 kbits (256 x 8-bit) EEPROM Register Dump in hex format for a multi-device
DS100BR111A application.
EEPROM EEPROM
Address (Hex) Comments
Address Data
0 00 0x43 CRC_EN = 0, Address Map = 1, Device Count = 3 (Devices 0, 1, 2, and 3)
1 01 0x00
2 02 0x08 EEPROM Burst Size
3 03 0x00 CRC not used
4 04 0x0B Device 0 Address Location
5 05 0x00 CRC not used
6 06 0x30 Device 1 Address Location
7 07 0x00 CRC not used
8 08 0x30 Device 2 Address Location
9 09 0x00 CRC not used
10 0A 0x0B Device 3 Address Location
11 0B 0x00 Begin Device 0 and Device 3 - Address Offset 3
12 0C 0x00
13 0D 0x04
14 0E 0x07
15 0F 0x00
16 10 0x2F Default EQ CHA
17 11 0xED
18 12 0x40
19 13 0x02 Default EQ CHB
20 14 0xFE Default EQ CHB
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