Datasheet

DRV8834
www.ti.com SLVSB19C –FEBRUARY 2012–REVISED JUNE 2013
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1) (2)
VALUE UNIT
VM Power supply voltage range –0.3 to 11.8 V
AVREF,
BVREF,
VINT, Analog input pin voltage range -0.5 to 3.6 V
ADECAY,
BDECAY
Digital input pin voltage range –0.5 to 7 V
xISEN pin voltage –0.3 to 0.5 V
Peak motor drive output current, t < 1 µs Internally limited A
T
J
Operating virtual junction temperature range –40 to 150 °C
T
stg
Storage temperature range –60 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
THERMAL INFORMATION
PWP RGE
THERMAL METRIC UNITS
24 PINS 24 PINS
θ
JA
Junction-to-ambient thermal resistance
(1)
40.2 35.1
θ
JCtop
Junction-to-case (top) thermal resistance
(2)
23.7 36.6
θ
JB
Junction-to-board thermal resistance
(3)
21.9 12.2
°C/W
ψ
JT
Junction-to-top characterization parameter
(4)
0.7 0.6
ψ
JB
Junction-to-board characterization parameter
(5)
21.7 12.2
θ
JCbot
Junction-to-case (bottom) thermal resistance
(6)
3.9 4.0
(1) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(4) The junction-to-top characterization parameter, ψ
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(5) The junction-to-board characterization parameter, ψ
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
xxx
RECOMMENDED OPERATING CONDITIONS
T
A
= 25°C, over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
M
Motor power supply voltage range
(1)
2.5 10.8 V
V
REF
VREF input voltage range
(2)
1 2.1 V
I
VINT
VINT external load current 1 mA
I
VREF
VREF external load current 400 µA
V
DIGIN
Digital input pin voltage range -0.3 5.75 V
I
OUT
Continuous RMS or DC output current per bridge
(3)
1.5 A
(1) Note that R
DS(ON)
increases and maximum output current is reduced at VM supply voltages below 5 V.
(2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.
(3) Power dissipation and thermal limits must be observed.
Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: DRV8834