Datasheet

OUT1
OUT2
2
1
2
PWM on
PWM off
VCC
1
Shown with
IN1=1, IN2=0
DRV8830
www.ti.com
SLVSAB2F MAY 2010 REVISED FEBRUARY 2012
Voltage Regulation
The DRV8830 provides the ability to regulate the voltage applied to the motor winding. This feature allows
constant motor speed to be maintained even when operating from a varying supply voltage such as a
discharging battery.
The DRV8830 uses a pulse-width modulation (PWM) technique instead of a linear circuit to minimize current
consumption and maximize battery life.
The circuit monitors the voltage difference between the output pins and integrates it, to get an average DC
voltage value. This voltage is divided by 4 and compared to the output voltage of the VSET DAC, which is set
through the serial interface. If the averaged output voltage (divided by 4) is lower than VSET, the duty cycle of
the PWM output is increased; if the averaged output voltage (divided by 4) is higher than VSET, the duty cycle is
decreased.
During PWM regulation, the H-bridge is enabled to drive current through the motor winding during the PWM on
time. This is shown in the diagram below as case 1. The current flow direction shown indicates the state when
IN1 is high and IN2 is low.
Note that if the programmed output voltage is greater than the supply voltage, the device will operate at 100%
duty cycle and the voltage regulation feature will be disabled. In this mode the device behaves as a conventional
H-bridge driver.
During the PWM off time, winding current is re-circulated by enabling both of the high-side FETs in the bridge.
This is shown as case 2 below.
Figure 6. Voltage Regulation
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