Datasheet

DRV8830
www.ti.com
SLVSAB2F MAY 2010 REVISED FEBRUARY 2012
Current Limit
A current limit circuit is provided to protect the system in the event of an overcurrent condition, such as what
would be encountered if driving a DC motor at start-up or with an abnormal mechanical load (stall condition).
The motor current is sensed by monitoring the voltage across an external sense resistor. When the voltage
exceeds a reference voltage of 200 mV for more than approximately 3 µs, the PWM duty cycle is reduced to limit
the current through the motor to this value. This current limit allows for starting the motor while controlling the
current.
If the current limit condition persists for some time, it is likely that a fault condition has been encountered, such
as the motor being run into a stop or a stalled condition. An overcurrent event must persist for approximately
275 ms before the fault is registered. After approximately 275 ms, a fault signaled to the host by driving the
FAULTn signal low and setting the FAULT and ILIMIT bits in the serial interface register. Operation of the motor
driver will continue.
The current limit fault condition is cleared by setting both IN1 and IN2 to zero to disable the motor current, by
putting the device into the shutdown state (IN1 and IN2 both set to 1), by setting the CLEAR bit in the fault
register, or by removing and re-applying power to the device.
The resistor used to set the current limit must be less than 1 Ω. Its value may be calculated as follows:
(1)
Where:
R
ISENSE
is the current sense resistor value.
I
LIMIT
is the desired current limit (in mA).
If the current limit feature is not needed, the ISENSE pin may be directly connected to ground.
Protection Circuits
The DRV8830 is fully protected against undervoltage, overcurrent and overtemperature events. A FAULTn pin is
available to signal a fault condition to the system, as well as a FAULT register in the serial interface that allows
determination of the fault source.
Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled, the FAULTn
signal will be driven low, and the FAULT and OCP bits in the FAULT register will be set. The device will remain
disabled until the CLEAR bit in the FAULT register is written to 1, or VCC is removed and re-applied.
Overcurrent conditions are sensed independently on both high and low side devices. A short to ground, supply,
or across the motor winding will all result in an overcurrent shutdown. Note that OCP is independent of the
current limit function, which is typically set to engage at a lower current level; the OCP function is intended to
prevent damage to the device under abnormal (e.g., short-circuit) conditions.
Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled, the FAULTn signal will be
driven low, and the FAULT and OTS bits in the serial interface register will be set. Once the die temperature has
fallen to a safe level operation will automatically resume.
Undervoltage Lockout (UVLO)
If at any time the voltage on the VCC pins falls below the undervoltage lockout threshold voltage, all FETs in the
H-bridge will be disabled, the FAULTn signal will be driven low, and the FAULT and UVLO bits in the FAULT
register will be set. Operation will resume when VCC rises above the UVLO threshold.
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