Datasheet
DRV8813
www.ti.com
SLVSA72D –APRIL 2010–REVISED AUGUST 2013
THERMAL INFORMATION
DRV8813
THERMAL METRIC
(1)
PWP UNITS
28 PINS
θ
JA
Junction-to-ambient thermal resistance
(2)
31.6
θ
JCtop
Junction-to-case (top) thermal resistance
(3)
15.9
θ
JB
Junction-to-board thermal resistance
(4)
5.6
°C/W
ψ
JT
Junction-to-top characterization parameter
(5)
0.2
ψ
JB
Junction-to-board characterization parameter
(6)
5.5
θ
JCbot
Junction-to-case (bottom) thermal resistance
(7)
1.4
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψ
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψ
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
M
Motor power supply voltage range
(1)
8.2 45 V
V
REF
VREF input voltage
(2)
1 3.5 V
I
V3P3
V3P3OUT load current 0 1 mA
f
PWM
Externally applied PWM frequency 0 100 kHZ
(1) All V
M
pins must be connected to the same supply voltage.
(2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES
I
VM
VM operating supply current V
M
= 24 V, f
PWM
< 50 kHz 5 8 mA
I
VMQ
VM sleep mode supply current V
M
= 24 V 10 20 μA
V
UVLO
VM undervoltage lockout voltage V
M
rising 7.8 8.2 V
V3P3OUT REGULATOR
V
3P3
V3P3OUT voltage IOUT = 0 to 1 mA 3.2 3.3 3.4 V
LOGIC-LEVEL INPUTS
V
IL
Input low voltage 0.6 0.7 V
V
IH
Input high voltage 2.2 5.25 V
V
HYS
Input hysteresis 0.3 0.45 0.6 V
I
IL
Input low current VIN = 0 –20 20 μA
I
IH
Input high current VIN = 3.3 V 100 μA
R
PD
Internal pulldown resistance 100 kΩ
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