Datasheet
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2
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7
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9
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14 15
16
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18
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28
27
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25
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21
20
ISENA
HOME
DIR
AOUT1
DECAY
RCA
GND
VREF
RCB
VCC
BOUT1
USM1
USM0
ISENB
VMA
SLEEPn
ENABLEn
AOUT2
CP2
CP1
VCP
GND
VGD
STEP
BOUT2
RESETn
SRn
VMB
GND
(PPAD)
DRV8811
SLVS865G –SEPTEMBER 2008–REVISED MAY 2010
www.ti.com
PWP (HTSSOP) PACKAGE
ABSOLUTE MAXIMUM RATINGS
(1) (2) (3)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
MX
Power supply voltage range –0.3 40 V
V
CC
Power supply voltage range –0.3 7 V
Digital pin voltage range –0.5 V
CC
V
V
REF
Input voltage range –0.3 V V
CC
V
ISENSEx pin voltage range –0.3 0.5 V
I
O(peak)
Peak motor drive output current, t < 1 ms 6 A
I
O
Continuous motor drive output current ±2.5 A
P
D
Continuous total power dissipation See Dissipation Ratings Table
T
J
Operating virtual junction temperature range –40 150 °C
T
A
Operating ambient temperature range –40 85 °C
T
stg
Storage temperature range –60 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Power dissipation and thermal limits must be observed.
DISSIPATION RATINGS
DERATING
BOARD PACKAGE R
q JA
FACTOR T
A
< 25°C T
A
= 70°C T
A
= 85°C
ABOVE T
A
= 25°C
Low-K
(1)
PWP 67.5 °C/W 14.8 mW/°C 1.85 W 1.18 W 0.96 W
Low-K
(2)
PWP 39.5 °C/W 25.3 mW/°C 3.16 W 2.02 W 1.64 W
High-K
(3)
PWP 33.5 °C/W 29.8 mW/°C 3.73 W 2.38 W 1.94 W
High-K
(4)
PWP 28 °C/W 35.7 mW/°C 4.46 W 2.85 W 2.32 W
(1) The JEDEC Low-K board used to derive this data was a 76 mm x 114 mm, 2-layer, 1.6 mm thick PCB with no backside copper.
(2) The JEDEC Low-K board used to derive this data was a 76 mm x 114 mm, 2-layer, 1.6 mm thick PCB with 25 cm
2
2-oz copper on
backside.
(3) The JEDEC High-K board used to derive this data was a 76 mm x 114 mm, 4-layer, 1.6 mm thick PCB with no backside copper and
solid 1 oz. internal ground plane.
(4) The JEDEC High-K board used to derive this data was a 76 mm x 114 mm, 4-layer, 1.6 mm thick PCB with 25 cm
2
1-oz copper on
backside and solid 1 oz. internal ground plane.
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Product Folder Link(s): DRV8811