Datasheet

tOCP

tDEG

IPEAK

IOCP

IOUTx

High-Z

VOUTA

VOUTB

Enable,

Source

or Sink

Charge Pump

Counter

NFAULT

Motor Lead

Short Condition

Normal DC

Motor Capacitance

DRV8800

DRV8801

www.ti.com

SLVS855I –JULY 2008–REVISED JANUARY 2014

Figure 6. Overcurrent Control Timing

FUNCTIONAL DESCRIPTION

Device Operation

The DRV8800/DRV8801 is designed to drive one dc motor. The current through the output full-bridge switches

and all N-channel DMOS are regulated with a fixed off-time PWM control circuit.

Logic Inputs

It is recommended to use a high-value pullup resistor when logic inputs are pulled up to V

. This resistor limits

the current to the input in case an overvoltage event occurs. Logic inputs are nSLEEP, MODE, PHASE, and

ENABLE. Voltages higher than 7 V on any logic input can cause damage to the input structure.

VREG (DRV8800 Only)

This output represents a measurement of the internal regulator voltage. This pin should be left disconnected. A

voltage of approximately 7.5 V can be measured at this pin.

VPROPI (DRV8801 Only)

This output offers an analog voltage proportional to the winding current. Voltage at this terminal is five times

greater than the motor winding current (VPROPI = 5×I). VPROPI is meaningful only if there is a resistor

connected to the SENSE pin. If SENSE is connected to ground, VPROPI measures 0 V. During slow decay,

VPROPI outputs 0 V. VPROPI can output a maximum of 2.5 V, since at 500 mV on SENSE, the H-bridge is

disabled.

Product Folder Links: DRV8800 DRV8801