Datasheet

REXT
OUT–
OUT+
PVDD
VBSTGND
GND
FB
VDD
VPUMP
EN GAIN1 GAIN0 IN+ IN–
GND SW SW NC VBST
14
13
12
19
15
11
18 17 1620
2
3
4
1
5
7 8 9 106
DRV8662
SLOS709A –JUNE 2011–REVISED NOVEMBER 2012 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
QFN (RGP)
4mm x 4 mm x 0.9 mm
Device DRV8662RGPR
Symbolization 8662
PINOUT INFORMATION
TOP VIEW
QFN (RGP)
PIN FUNCTIONS
PIN
INPUT/ OUTPUT/
DESCRIPTION
POWER (I/O/P)
NAME NO. (RGP)
IN+ 17 I Non-inverting input
IN– 16 I Inverting input
OUT+ 13 O Non-inverting output
OUT- 14 O Inverting output
VDD 2 P Power supply (connect to battery)
GND 4, 5, 6 P Ground
SW 7, 8 P Internal boost switch pin
PVDD 12 P Amplifier supply voltage
GAIN0 18 I Gain programming pin – LSB
GAIN1 19 I Gain programming pin – MSB
EN 20 I Chip enable
VPUMP 1 P Internal Charge-pump voltage
FB 3 I Boost feedback
VBST 10, 11 P Boost output voltage
REXT 15 I Resistor to ground, sets boost current limit
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Product Folder Links: DRV8662