Datasheet

DRV8662
EN
GAIN1
VDD SW
GND
C1
VBAT
3.0 V - 5.5 V
IN+
IN-
L
PVDD
VPUMP
OUT+
OUT-
C3
Processor
Digital
Control
GAIN0
C2
R1
R2
FB
VBST
R3
REXT
C4
C5
C6
R4
Piezo
Actuator
DRV8662
EN
GAIN1
VDD SW
GND
C1
VBAT
3.0 V - 5.5 V
IN+
IN-
L
PVDD
VPUMP
OUT+
OUT-
C3
Digital
Control
GAIN0
C2
R1
R2
FB
VBST
R3
REXT
C4
C5
DAC
Piezo
Actuator
DRV8662
SLOS709A –JUNE 2011–REVISED NOVEMBER 2012 www.ti.com
SYSTEM DIAGRAMS
Figure 13. DRV8662 System Diagram with DAC Input
Figure 14. DRV8662 System Diagram with Filtered Single-Ended PWM Input
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