Datasheet
DRV8662
SLOS709A –JUNE 2011–REVISED NOVEMBER 2012
www.ti.com
PIEZO ACTUATOR SELECTION
There are several key specifications to consider when choosing a piezo actuator for haptics such as dimensions,
blocking force, and displacement. However, the key electrical specifications from the driver perspective are
voltage rating and capacitance. At the maximum frequency of 500 Hz, the DRV8662 is optimized to drive up to
50 nF at 200 V
PP
, which is the highest voltage swing capability. It will drive larger capacitances if the
programmed boost voltage is lowered and/or the user limits the input frequency range to lower frequencies (e.g.
300 Hz).
For piezo actuator recommendations, see the DRV8662EVM User's Guide (SLOU302).
BOOST CAPACITOR SELECTION
The boost output voltage may be programmed as high as 105V. A capacitor with a voltage rating of at least the
boost output voltage must be selected. Since ceramic capacitors tend to come in ratings of 100 V or 250 V, a
250 V rated 100 nF capacitor of the X5R or X7R type is recommended for the 105 V case. The selected
capacitor should have a minimum working capacitance of at least 50 nF.
LOW-VOLTAGE OPERATION
The lowest gain setting is optimized for 50 V
PP
with a boost voltage of 30 V. Some applications may not need 50
V
PP
, so the user may elect to program the boost converter as low as 15 V to improve efficiency. When using
boost voltages lower than 30 V, some special considerations are in order. First, to reduce boost ripple to an
acceptable level, a 50 V rated, 0.22 µF boost capacitor is recommended. Second, the full-scale input range may
need adjustment to avoid clipping. Normally, a 1.8 V, single-ended PWM signal will give 50 V
PP
at the lowest
gain. For example, if the boost voltage is set to 25 V for a 40 V
PP
full-scale output signal, the full-scale input
range drops to 1.44 V for single-ended PWM inputs. An input voltage divider may be desired in this case if a
1.8V I/O is used as a PWM source.
THERMAL/LAYOUT CONSIDERATIONS
To achieve optimum device performance, use of the thermal footprint outlined by this datasheet is
recommended. See land pattern diagram for exact dimensions. The DRV8662 power pad must be soldered
directly to the thermal pad on the printed circuit board. The printed circuit board thermal pad should be
connected to the ground net with thermal vias to any existing backside/internal copper ground planes.
Connection to a ground plane on the top layer near the corners of the device is also recommended.
Another key layout consideration is to keep the boost programming resistors (R1 and R2) as close as possible to
the FB pin of the DRV8662. Care should be taken to avoid getting the FB trace near the SW trace.
10 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Links: DRV8662