Datasheet

Temp.
Sense
M1
M2
RESET_A
FAULT
OTW
AGND
OC_ADJ
VREG VREG
VDD
M3
Power
On
Reset
Under-
voltage
Protection
GND
PWM_C OUT_C
GND_C
PVDD_C
BST_C
Timing
Gate
Drive
PWM
Rcv.
Overload
Protection
I
sense
GVDD_C
RESET_B
4
Protection
and
I/OLogic
PWM_B OUT_B
GND_B
PVDD_B
BST_B
Timing
Gate
Drive
Ctrl.
PWM
Rcv.
GVDD_B
PWM_A OUT_A
GND_A
PVDD_A
BST_A
Timing
Gate
Drive
Ctrl.
PWM
Rcv.
GVDD_A
Ctrl.
InternalPullup
ResistorstoVREG
4
RESET_C
DRV8312
DRV8332
SLES256D –MAY 2010–REVISED JANUARY 2014 www.ti.com
SYSTEM BLOCK DIAGRAM
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