Datasheet

DRV8302
www.ti.com SLES267 –AUGUST 2011
GATE TIMING AND PROTECTION CHARACTERISTICS
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TIMING, OUTPUT PINS
t
pd,If-O
Positive input falling to GH_x falling CL=1nF, 50% to 50% 45 ns
t
pd,Ir-O
Positive input rising to GL_x falling CL=1nF, 50% to 50% 45 ns
T
d_min
Minimum dead time after hand shaking
(1)
50 ns
T
dtp
Dead Time With R
DTC
set to different values 50 500 ns
t
GDr
Rise time, gate drive output CL=1nF, 10% to 90% 25 ns
t
GDF
Fall time, gate drive output CL=1nF, 90% to 10% 25 ns
Not including handshake communication.
T
ON_MIN
Minimum on pulse 50 ns
Hiz to on state, output of gate driver
Propagation delay matching between high
T
pd_match
5 ns
side and low side
T
dt_match
Deadtime matching 5 ns
TIMING, PROTECTION AND CONTROL
PVDD is up before start up, all charge
Start up time, from EN_GATE active high
t
pd,R_GATE-OP
pump caps and regulator caps as in 5 10 ms
to device ready for normal operation
recommended condition
If EN_GATE goes from high to low and
back to high state within quick reset time,
it will only reset all faults and gate driver
t
pd,R_GATE-Quick
Maximum low pulse time 10 us
without powering down charge pump,
current amp, and related internal voltage
regulators.
t
pd,E-L
Delay, error event to all gates low 200 ns
t
pd,E-FAULT
Delay, error event to FAULT low 200 ns
Junction temperature for resetting over
OTW_CLR 115 °C
temperature warning
Junction temperature for over
OTW_SET/OTSD
temperature warning and resetting over 130 °C
_CLR
temperature shut down
Junction temperature for over
OTSD_SET 150 °C
temperature shut down
(1) Dead time programming definition: Adjustable delay from GH_x falling edge to GL_X rising edge, and GL_X falling edge to GH_X rising
edge. This is a minimum dead-time insertion. It is not added to the value set by the microcontroller externally.
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