Datasheet

DRV8301
SLOS719B –AUGUST 2011–REVISED AUGUST 2013 www.ti.com
Table 1. Fault and Warning Reporting and Handling
REPORTING ON REPORTING ON REPORTING IN SPI
EVENT ACTION LATCH
FAULT PIN OCTW PIN STATUS REGISTER
External FETs HiZ;
PVDD
Weak pull down of all gate N Y N Y
undervoltage
driver output
External FETs HiZ;
DVDD Weak pull down of all gate
N Y N N
undervoltage driver output; When recovering,
reset all status registers
External FETs HiZ;
GVDD
Weak pull down of all gate N Y N Y
undervoltage
driver output
External FETs HiZ;
Weak pull down of all gate driver
output
GVDD
Shut down the charge pump
Y Y N Y
overvoltage
Won’t recover and reset through
SPI reset command or
quick EN_GATE toggling
Y (in default
OTW None N N Y
setting)
Gate driver latched shut down.
Weak pull down of all gate driver
output
OTSD_GATE Y Y Y Y
to force external FETs HiZ
Shut down the charge pump
OTSD_BUCK OTSD of Buck Y N N N
Buck output
UVLO_BUCK: auto-restart N Y, in PWRGD pin N N
undervoltage
Buck current limiting
Buck overload (HiZ high side until current reaches N N N N
zero and then auto-recovering)
External FET
External FETs current Limiting
Y, indicates which phase
N N Y
overload – current
has OC
(only OC detected FET)
limit mode
Weak pull down of gate driver
External FET
output and PWM logic “0” of
Y Y Y Y
overload – Latch
LS and HS in the same phase.
mode
External FETs HiZ
External FET
Y, indicates which phase
overload –
Reporting only N N Y
has OC
reporting only
mode
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