Datasheet

DRV612
SLOS690B –DECEMBER 2010– REVISED APRIL 2011 www.ti.com
PROGRAMMABLE GAIN SETTINGS
(1)(2)
VDD = 3.3 V, R
load
= 10 kΩ, T
A
= 25°C, Charge pump: C
CP
= 1 μF, 1× gain select, unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
R_Tol Gain programming resistor tolerance 2%
ΔA
V
Gain matching Between left and right channels 0.25 dB
Gain step tolerance 0.1 dB
Gain resistor 2% tolerance A
249k or higher –2
82k5 –1
51k1 –1.5
34k8 –2.3
27k4 –2.5
20k5 –3
Gain steps V/V
15k4 –3.5
11k5 –4
9k09 –5
7k50 –5.6
6k19 –6.4
5k11 –8.3
4k22 –10
Gain resistor 2% tolerance A
249k or higher 37
82k5 55
51k1 44
34k8 33
27k4 31
20k5 28
Input impedance kΩ
15k4 24
11k5 22
9k09 18
7k50 17
6k19 15
5k11 12
4k22 10
(1) If the GAIN pin is left floating, an internal pullup sets the gain to –2×.
(2) Gain setting is latched during power up.
6 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated
Product Folder Link(s) :DRV612